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Searched refs:mmMAILBOX_CONTROL (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_vi.c324 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_mailbox_send_ack()
326 WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg); in xgpu_vi_mailbox_send_ack()
329 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_mailbox_send_ack()
338 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_mailbox_send_ack()
346 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_mailbox_set_valid()
349 WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg); in xgpu_vi_mailbox_set_valid()
373 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_mailbox_rcv_msg()
394 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_poll_ack()
404 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL); in xgpu_vi_poll_ack()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_0_d.h185 #define mmMAILBOX_CONTROL 0x14d0 macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h1149 #define mmMAILBOX_CONTROL macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_0_offset.h4500 #define mmMAILBOX_CONTROL macro