Searched refs:mmHDP_HOST_PATH_CNTL (Results 1 – 11 of 11) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/hdp/ |
| D | hdp_4_0_offset.h | 42 #define mmHDP_HOST_PATH_CNTL 0x00cc macro
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| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_d.h | 136 #define mmHDP_HOST_PATH_CNTL 0x0B00 macro
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| D | oss_2_4_d.h | 379 #define mmHDP_HOST_PATH_CNTL 0xb00 macro
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| D | oss_3_0_1_d.h | 500 #define mmHDP_HOST_PATH_CNTL 0xb00 macro
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| D | oss_2_0_d.h | 550 #define mmHDP_HOST_PATH_CNTL 0xb00 macro
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| D | oss_3_0_d.h | 595 #define mmHDP_HOST_PATH_CNTL 0xb00 macro
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| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | vi.c | 268 mmHDP_HOST_PATH_CNTL, 0xffffffff, 0x0f000027,
1295 temp = data = RREG32(mmHDP_HOST_PATH_CNTL); in vi_update_hdp_medium_grain_clock_gating()
1303 WREG32(mmHDP_HOST_PATH_CNTL, data); in vi_update_hdp_medium_grain_clock_gating()
1548 data = RREG32(mmHDP_HOST_PATH_CNTL); in vi_common_get_clockgating_state()
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| D | gmc_v7_0.c | 305 tmp = RREG32(mmHDP_HOST_PATH_CNTL); in gmc_v7_0_mc_program()
306 WREG32(mmHDP_HOST_PATH_CNTL, tmp); in gmc_v7_0_mc_program()
877 orig = data = RREG32(mmHDP_HOST_PATH_CNTL); in gmc_v7_0_enable_hdp_mgcg()
885 WREG32(mmHDP_HOST_PATH_CNTL, data); in gmc_v7_0_enable_hdp_mgcg()
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| D | gmc_v9_0.c | 1037 tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL); in gmc_v9_0_gart_enable()
1038 WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); in gmc_v9_0_gart_enable()
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| D | gmc_v8_0.c | 485 tmp = RREG32(mmHDP_HOST_PATH_CNTL); in gmc_v8_0_mc_program()
486 WREG32(mmHDP_HOST_PATH_CNTL, tmp); in gmc_v8_0_mc_program()
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| D | gfx_v6_0.c | 1752 hdp_host_path_cntl = RREG32(mmHDP_HOST_PATH_CNTL); in gfx_v6_0_gpu_init()
1753 WREG32(mmHDP_HOST_PATH_CNTL, hdp_host_path_cntl); in gfx_v6_0_gpu_init()
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