Searched refs:mmHDMI_INFOFRAME_CONTROL0 (Results 1 – 9 of 9) sorted by relevance
1560 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v6_0_audio_hdmi_enable()1565 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v6_0_audio_hdmi_enable()1575 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v6_0_audio_hdmi_enable()1580 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v6_0_audio_hdmi_enable()
1656 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1661 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()1740 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1745 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
1614 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1619 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()1698 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1703 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
1563 WREG32(mmHDMI_INFOFRAME_CONTROL0 + offset, in dce_v8_0_afmt_setmode()1632 WREG32_OR(mmHDMI_INFOFRAME_CONTROL0 + offset, in dce_v8_0_afmt_setmode()
3864 #define mmHDMI_INFOFRAME_CONTROL0 0x1C11 macro
2935 #define mmHDMI_INFOFRAME_CONTROL0 0x1c11 macro
3714 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro
3517 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro
4748 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro