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Searched refs:mmGC_DIDT_CTRL0 (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega10_powertune.c594 …{ mmGC_DIDT_CTRL0, GC_DIDT_CTRL0__DIDT_CTRL_EN_MASK, GC_DIDT_CTRL0__DIDT_CTRL…
595 …{ mmGC_DIDT_CTRL0, GC_DIDT_CTRL0__PHASE_OFFSET_MASK, GC_DIDT_CTRL0__PHASE_OFF…
596 …{ mmGC_DIDT_CTRL0, GC_DIDT_CTRL0__DIDT_SW_RST_MASK, GC_DIDT_CTRL0__DIDT_SW_RS…
597 …{ mmGC_DIDT_CTRL0, GC_DIDT_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, GC_DIDT_CTRL0__D…
598 …{ mmGC_DIDT_CTRL0, GC_DIDT_CTRL0__DIDT_TRIGGER_THROTTLE_LOWBIT_MASK, GC_DIDT_…
1034 cgs_write_register(hwmgr->device, mmGC_DIDT_CTRL0, data); in vega10_disable_psm_gc_didt_config()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2897 #define mmGC_DIDT_CTRL0 … macro
Dgc_9_1_offset.h3186 #define mmGC_DIDT_CTRL0 … macro
Dgc_9_2_1_offset.h3142 #define mmGC_DIDT_CTRL0 … macro