Searched refs:mmCP_RB0_WPTR (Results 1 – 12 of 12) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v6_0.c | 2111 WREG32(mmCP_RB0_WPTR, ring->wptr); in gfx_v6_0_cp_gfx_resume()
2147 return RREG32(mmCP_RB0_WPTR); in gfx_v6_0_ring_get_wptr()
2160 WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v6_0_ring_set_wptr_gfx()
2161 (void)RREG32(mmCP_RB0_WPTR); in gfx_v6_0_ring_set_wptr_gfx()
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| D | gfx_v7_0.c | 2597 WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v7_0_cp_gfx_resume()
2635 return RREG32(mmCP_RB0_WPTR); in gfx_v7_0_ring_get_wptr_gfx()
2642 WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v7_0_ring_set_wptr_gfx()
2643 (void)RREG32(mmCP_RB0_WPTR); in gfx_v7_0_ring_set_wptr_gfx()
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| D | gfx_v9_0.c | 2492 WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v9_0_cp_gfx_resume()
3879 wptr = RREG32_SOC15(GC, 0, mmCP_RB0_WPTR); in gfx_v9_0_ring_get_wptr_gfx()
3895 WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v9_0_ring_set_wptr_gfx()
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| D | gfx_v8_0.c | 4499 WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v8_0_cp_gfx_resume()
6295 return RREG32(mmCP_RB0_WPTR); in gfx_v8_0_ring_get_wptr_gfx()
6307 WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); in gfx_v8_0_ring_set_wptr_gfx()
6308 (void)RREG32(mmCP_RB0_WPTR); in gfx_v8_0_ring_set_wptr_gfx()
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| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_d.h | 499 #define mmCP_RB0_WPTR 0x3045 macro
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| D | gfx_7_0_d.h | 214 #define mmCP_RB0_WPTR 0x3045 macro
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| D | gfx_7_2_d.h | 214 #define mmCP_RB0_WPTR 0x3045 macro
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| D | gfx_8_0_d.h | 238 #define mmCP_RB0_WPTR 0x3045 macro
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| D | gfx_8_1_d.h | 239 #define mmCP_RB0_WPTR 0x3045 macro
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| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2378 #define mmCP_RB0_WPTR … macro
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| D | gc_9_1_offset.h | 2692 #define mmCP_RB0_WPTR … macro
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| D | gc_9_2_1_offset.h | 2630 #define mmCP_RB0_WPTR … macro
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