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Searched refs:mmCP_INT_CNTL_RING0 (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2256 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_enable_gui_idle_interrupt()
2266 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v6_0_enable_gui_idle_interrupt()
3253 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state()
3255 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state()
3258 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_gfx_eop_interrupt_state()
3260 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_gfx_eop_interrupt_state()
3316 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_priv_reg_fault_state()
3318 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state()
3321 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v6_0_set_priv_reg_fault_state()
3323 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v6_0_set_priv_reg_fault_state()
[all …]
Dgfx_v7_0.c3141 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_enable_gui_idle_interrupt()
3149 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v7_0_enable_gui_idle_interrupt()
4797 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state()
4799 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state()
4802 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_gfx_eop_interrupt_state()
4804 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_gfx_eop_interrupt_state()
4871 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state()
4873 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state()
4876 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0); in gfx_v7_0_set_priv_reg_fault_state()
4878 WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl); in gfx_v7_0_set_priv_reg_fault_state()
[all …]
Dgfx_v9_0.c1866 u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0); in gfx_v9_0_enable_gui_idle_interrupt()
1873 WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp); in gfx_v9_0_enable_gui_idle_interrupt()
Dgfx_v8_0.c3980 u32 tmp = RREG32(mmCP_INT_CNTL_RING0); in gfx_v8_0_enable_gui_idle_interrupt()
3987 WREG32(mmCP_INT_CNTL_RING0, tmp); in gfx_v8_0_enable_gui_idle_interrupt()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h438 #define mmCP_INT_CNTL_RING0 0x306A macro
Dgfx_7_0_d.h222 #define mmCP_INT_CNTL_RING0 0x306a macro
Dgfx_7_2_d.h222 #define mmCP_INT_CNTL_RING0 0x306a macro
Dgfx_8_0_d.h246 #define mmCP_INT_CNTL_RING0 0x306a macro
Dgfx_8_1_d.h247 #define mmCP_INT_CNTL_RING0 0x306a macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2426 #define mmCP_INT_CNTL_RING0 … macro
Dgc_9_1_offset.h2740 #define mmCP_INT_CNTL_RING0 … macro
Dgc_9_2_1_offset.h2678 #define mmCP_INT_CNTL_RING0 … macro