Home
last modified time | relevance | path

Searched refs:mmCP_HQD_PQ_CONTROL (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/inc/
Dpolaris10_pwrvirus.h1513 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1523 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1533 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1543 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h584 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
Dgfx_7_2_d.h597 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
Dgfx_8_0_d.h647 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
Dgfx_8_1_d.h647 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c2775 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL); in gfx_v9_0_mqd_init()
2896 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, in gfx_v9_0_kiq_init_register()
Dgfx_v7_0.c2935 mqd->cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_mqd_init()
Dgfx_v8_0.c4763 tmp = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v8_0_mqd_init()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2789 #define mmCP_HQD_PQ_CONTROL macro
Dgc_9_1_offset.h3074 #define mmCP_HQD_PQ_CONTROL macro
Dgc_9_2_1_offset.h3030 #define mmCP_HQD_PQ_CONTROL macro