Searched refs:mmCPC_INT_STATUS (Results 1 – 9 of 9) sorted by relevance
273 #define mmCPC_INT_STATUS 0x30b5 macro
275 #define mmCPC_INT_STATUS 0x30b5 macro
306 #define mmCPC_INT_STATUS 0x30b5 macro
2551 #define mmCPC_INT_STATUS … macro
2860 #define mmCPC_INT_STATUS … macro
2794 #define mmCPC_INT_STATUS … macro
4185 amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS)); in gfx_v9_0_ring_emit_fence_kiq()
6618 amdgpu_ring_write(ring, mmCPC_INT_STATUS); in gfx_v8_0_ring_emit_fence_kiq()