Home
last modified time | relevance | path

Searched refs:memory_level (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1230 SMU71_Discrete_MemoryLevel *memory_level in iceland_populate_single_memory_level() argument
1242 hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); in iceland_populate_single_memory_level()
1248 memory_level->MinVddci = memory_level->MinVddc; in iceland_populate_single_memory_level()
1253 &memory_level->MinVddci); in iceland_populate_single_memory_level()
1258 memory_level->MinVddcPhases = 1; in iceland_populate_single_memory_level()
1262 memory_clock, &memory_level->MinVddcPhases); in iceland_populate_single_memory_level()
1265 memory_level->EnabledForThrottle = 1; in iceland_populate_single_memory_level()
1266 memory_level->EnabledForActivity = 0; in iceland_populate_single_memory_level()
1267 memory_level->UpHyst = data->current_profile_setting.mclk_up_hyst; in iceland_populate_single_memory_level()
1268 memory_level->DownHyst = data->current_profile_setting.mclk_down_hyst; in iceland_populate_single_memory_level()
[all …]
Dci_smumgr.c1174 SMU7_Discrete_MemoryLevel *memory_level in ci_populate_single_memory_level() argument
1186 hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); in ci_populate_single_memory_level()
1195 &memory_level->MinVddci); in ci_populate_single_memory_level()
1204 &memory_level->MinMvdd); in ci_populate_single_memory_level()
1209 memory_level->MinVddcPhases = 1; in ci_populate_single_memory_level()
1213 memory_clock, &memory_level->MinVddcPhases); in ci_populate_single_memory_level()
1216 memory_level->EnabledForThrottle = 1; in ci_populate_single_memory_level()
1217 memory_level->EnabledForActivity = 1; in ci_populate_single_memory_level()
1218 memory_level->UpH = data->current_profile_setting.mclk_up_hyst; in ci_populate_single_memory_level()
1219 memory_level->DownH = data->current_profile_setting.mclk_down_hyst; in ci_populate_single_memory_level()
[all …]
Dtonga_smumgr.c952 SMU72_Discrete_MemoryLevel *memory_level in tonga_populate_single_memory_level() argument
976 &memory_level->MinVoltage, &mvdd); in tonga_populate_single_memory_level()
985 memory_level->MinMvdd = data->vbios_boot_state.mvdd_bootup_value; in tonga_populate_single_memory_level()
987 memory_level->MinMvdd = mvdd; in tonga_populate_single_memory_level()
989 memory_level->EnabledForThrottle = 1; in tonga_populate_single_memory_level()
990 memory_level->EnabledForActivity = 0; in tonga_populate_single_memory_level()
991 memory_level->UpHyst = data->current_profile_setting.mclk_up_hyst; in tonga_populate_single_memory_level()
992 memory_level->DownHyst = data->current_profile_setting.mclk_down_hyst; in tonga_populate_single_memory_level()
993 memory_level->VoltageDownHyst = 0; in tonga_populate_single_memory_level()
996 memory_level->ActivityLevel = data->current_profile_setting.mclk_activity; in tonga_populate_single_memory_level()
[all …]
/Linux-v4.19/drivers/gpu/drm/radeon/
Dci_dpm.c2875 SMU7_Discrete_MemoryLevel *memory_level) in ci_populate_single_memory_level() argument
2884 memory_clock, &memory_level->MinVddc); in ci_populate_single_memory_level()
2892 memory_clock, &memory_level->MinVddci); in ci_populate_single_memory_level()
2900 memory_clock, &memory_level->MinMvdd); in ci_populate_single_memory_level()
2905 memory_level->MinVddcPhases = 1; in ci_populate_single_memory_level()
2911 &memory_level->MinVddcPhases); in ci_populate_single_memory_level()
2913 memory_level->EnabledForThrottle = 1; in ci_populate_single_memory_level()
2914 memory_level->UpH = 0; in ci_populate_single_memory_level()
2915 memory_level->DownH = 100; in ci_populate_single_memory_level()
2916 memory_level->VoltageDownH = 0; in ci_populate_single_memory_level()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.c3018 SMU7_Discrete_MemoryLevel *memory_level) in ci_populate_single_memory_level() argument
3027 memory_clock, &memory_level->MinVddc); in ci_populate_single_memory_level()
3035 memory_clock, &memory_level->MinVddci); in ci_populate_single_memory_level()
3043 memory_clock, &memory_level->MinMvdd); in ci_populate_single_memory_level()
3048 memory_level->MinVddcPhases = 1; in ci_populate_single_memory_level()
3054 &memory_level->MinVddcPhases); in ci_populate_single_memory_level()
3056 memory_level->EnabledForActivity = 1; in ci_populate_single_memory_level()
3057 memory_level->EnabledForThrottle = 1; in ci_populate_single_memory_level()
3058 memory_level->UpH = 0; in ci_populate_single_memory_level()
3059 memory_level->DownH = 100; in ci_populate_single_memory_level()
[all …]