Searched refs:mec_hdr (Results 1 – 4 of 4) sorted by relevance
1039 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local1063 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()1067 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()1068 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_mec_init()1070 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()2555 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local2565 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()2566 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()2570 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()2583 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
2693 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local2700 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode()2701 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode()2702 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode()2704 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode()2711 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode()2712 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
4545 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v8_0_cp_compute_load_microcode() local4554 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v8_0_cp_compute_load_microcode()4555 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v8_0_cp_compute_load_microcode()4559 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v8_0_cp_compute_load_microcode()4560 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v8_0_cp_compute_load_microcode()
4266 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4271 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4275 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4276 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4280 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
