Searched refs:me_hdr (Results 1 – 6 of 6) sorted by relevance
2423 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v7_0_cp_gfx_load_microcode() local2432 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v7_0_cp_gfx_load_microcode()2436 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v7_0_cp_gfx_load_microcode()2439 adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); in gfx_v7_0_cp_gfx_load_microcode()2440 adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); in gfx_v7_0_cp_gfx_load_microcode()2469 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_gfx_load_microcode()2470 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_gfx_load_microcode()
1965 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v6_0_cp_gfx_load_microcode() local1975 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_cp_gfx_load_microcode()1979 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v6_0_cp_gfx_load_microcode()2001 (adev->gfx.me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v6_0_cp_gfx_load_microcode()2002 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v6_0_cp_gfx_load_microcode()
2352 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v9_0_cp_gfx_load_microcode() local2363 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v9_0_cp_gfx_load_microcode()2368 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v9_0_cp_gfx_load_microcode()2395 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_gfx_load_microcode()2396 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_cp_gfx_load_microcode()
4291 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v8_0_cp_gfx_load_microcode() local4302 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v8_0_cp_gfx_load_microcode()4307 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v8_0_cp_gfx_load_microcode()4334 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v8_0_cp_gfx_load_microcode()4335 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v8_0_cp_gfx_load_microcode()
3908 const struct gfx_firmware_header_v1_0 *me_hdr = in cik_cp_gfx_load_microcode() local3915 radeon_ucode_print_gfx_hdr(&me_hdr->header); in cik_cp_gfx_load_microcode()3937 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in cik_cp_gfx_load_microcode()3938 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in cik_cp_gfx_load_microcode()3942 WREG32(CP_ME_RAM_WADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()3943 WREG32(CP_ME_RAM_RADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()
3490 const struct gfx_firmware_header_v1_0 *me_hdr = in si_cp_load_microcode() local3497 radeon_ucode_print_gfx_hdr(&me_hdr->header); in si_cp_load_microcode()3519 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in si_cp_load_microcode()3520 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in si_cp_load_microcode()
