Searched refs:mclk_dpm_enable_mask (Results 1 – 14 of 14) sorted by relevance
167 uint32_t mclk_dpm_enable_mask; member
178 uint32_t mclk_dpm_enable_mask; member
156 uint32_t mclk_dpm_enable_mask; member
2630 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) { in smu7_force_dpm_highest()2632 tmp = data->dpm_level_enable_mask.mclk_dpm_enable_mask; in smu7_force_dpm_highest()2662 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) in smu7_upload_dpm_level_enable_mask()2665 data->dpm_level_enable_mask.mclk_dpm_enable_mask); in smu7_upload_dpm_level_enable_mask()2703 if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) { in smu7_force_dpm_lowest()2705 data->dpm_level_enable_mask.mclk_dpm_enable_mask); in smu7_force_dpm_lowest()3832 data->dpm_level_enable_mask.mclk_dpm_enable_mask = in smu7_generate_dpm_level_enable_mask()4369 data->dpm_level_enable_mask.mclk_dpm_enable_mask & mask); in smu7_force_clock_level()
111 u32 mclk_dpm_enable_mask; member
3357 pi->dpm_level_enable_mask.mclk_dpm_enable_mask = in ci_populate_all_memory_levels()3831 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()3834 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()3958 pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE; in ci_enable_uvd_dpm()3961 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_enable_uvd_dpm()3966 pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1; in ci_enable_uvd_dpm()3969 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_enable_uvd_dpm()4178 pi->dpm_level_enable_mask.mclk_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()4181 pi->dpm_level_enable_mask.mclk_dpm_enable_mask; in ci_generate_dpm_level_enable_mask()4183 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask & 1) in ci_generate_dpm_level_enable_mask()[all …]
112 u32 mclk_dpm_enable_mask; member
3500 pi->dpm_level_enable_mask.mclk_dpm_enable_mask = in ci_populate_all_memory_levels()3978 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()3981 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()4104 pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE; in ci_enable_uvd_dpm()4107 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_enable_uvd_dpm()4112 pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1; in ci_enable_uvd_dpm()4115 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); in ci_enable_uvd_dpm()4327 pi->dpm_level_enable_mask.mclk_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()4330 pi->dpm_level_enable_mask.mclk_dpm_enable_mask; in ci_generate_dpm_level_enable_mask()4332 if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask & 1) in ci_generate_dpm_level_enable_mask()[all …]
1065 hw_data->dpm_level_enable_mask.mclk_dpm_enable_mask = in vegam_populate_all_memory_levels()1070 (hw_data->dpm_level_enable_mask.mclk_dpm_enable_mask >> i) & 0x1; in vegam_populate_all_memory_levels()
1271 data->dpm_level_enable_mask.mclk_dpm_enable_mask = in fiji_populate_all_memory_levels()
1382 …data->dpm_level_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table-… in iceland_populate_all_memory_levels()
1162 hw_data->dpm_level_enable_mask.mclk_dpm_enable_mask = in polaris10_populate_all_memory_levels()
1336 …data->dpm_level_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table-… in ci_populate_all_memory_levels()
1120 …data->dpm_level_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table-… in tonga_populate_all_memory_levels()
