Searched refs:mclk_array (Results 1 – 4 of 4) sorted by relevance
2566 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings() local2621 clk_activity_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()2633 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()2635 down_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2391 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in polaris10_update_dpm_settings() local2446 clk_activity_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()2458 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()2460 down_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2765 uint32_t mclk_array = smu_data->dpm_table_start + in ci_update_dpm_settings() local2820 clk_activity_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()2832 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()2834 down_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
3144 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings() local3199 clk_activity_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()3211 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()3213 down_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
