Searched refs:max_tile_pipes (Results 1 – 17 of 17) sorted by relevance
377 *value = rdev->config.cik.max_tile_pipes; in radeon_info_ioctl()379 *value = rdev->config.si.max_tile_pipes; in radeon_info_ioctl()381 *value = rdev->config.cayman.max_tile_pipes; in radeon_info_ioctl()383 *value = rdev->config.evergreen.max_tile_pipes; in radeon_info_ioctl()385 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()387 *value = rdev->config.r600.max_tile_pipes; in radeon_info_ioctl()
1194 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()1214 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1238 rdev->config.rv770.max_tile_pipes = 2; in rv770_gpu_init()1258 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1320 switch (rdev->config.rv770.max_tile_pipes) { in rv770_gpu_init()1335 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; in rv770_gpu_init()
3155 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3177 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3199 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3222 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3244 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3266 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3294 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3316 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3338 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3360 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()[all …]
2020 unsigned max_tile_pipes; member2042 unsigned max_tile_pipes; member2069 unsigned max_tile_pipes; member2096 unsigned max_tile_pipes; member2134 unsigned max_tile_pipes; member2165 unsigned max_tile_pipes; member
2003 rdev->config.r600.max_tile_pipes = 8; in r600_gpu_init()2019 rdev->config.r600.max_tile_pipes = 2; in r600_gpu_init()2037 rdev->config.r600.max_tile_pipes = 1; in r600_gpu_init()2052 rdev->config.r600.max_tile_pipes = 4; in r600_gpu_init()2083 switch (rdev->config.r600.max_tile_pipes) { in r600_gpu_init()2099 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; in r600_gpu_init()
3101 rdev->config.si.max_tile_pipes = 12; in si_gpu_init()3118 rdev->config.si.max_tile_pipes = 8; in si_gpu_init()3136 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3153 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3170 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3207 rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; in si_gpu_init()
905 rdev->config.cayman.max_tile_pipes = 8; in cayman_gpu_init()929 rdev->config.cayman.max_tile_pipes = 2; in cayman_gpu_init()
2355 num_pipe_configs = rdev->config.cik.max_tile_pipes; in cik_tiling_mode_table_init()3189 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3206 rdev->config.cik.max_tile_pipes = 16; in cik_gpu_init()3223 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3242 rdev->config.cik.max_tile_pipes = 2; in cik_gpu_init()3277 rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; in cik_gpu_init()
1190 uint8_t max_tile_pipes; member1210 uint8_t max_tile_pipes; member1234 uint8_t max_tile_pipes; member
5651 UCHAR max_tile_pipes; member
1566 adev->gfx.config.max_tile_pipes = 12; in gfx_v6_0_gpu_init()1583 adev->gfx.config.max_tile_pipes = 8; in gfx_v6_0_gpu_init()1600 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_gpu_init()1617 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_gpu_init()1634 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_gpu_init()1664 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v6_0_gpu_init()
486 config[no_regs++] = adev->gfx.config.max_tile_pipes; in amdgpu_debugfs_gca_config_read()
4333 adev->gfx.config.max_tile_pipes = 4; in gfx_v7_0_gpu_early_init()4350 adev->gfx.config.max_tile_pipes = 16; in gfx_v7_0_gpu_early_init()4367 adev->gfx.config.max_tile_pipes = 4; in gfx_v7_0_gpu_early_init()4386 adev->gfx.config.max_tile_pipes = 2; in gfx_v7_0_gpu_early_init()4407 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v7_0_gpu_early_init()
741 adev->gfx.config.max_tile_pipes = gfx_info->info.max_tile_pipes; in amdgpu_atombios_get_gfx_info()
1794 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1811 adev->gfx.config.max_tile_pipes = 16; in gfx_v8_0_gpu_early_init()1858 adev->gfx.config.max_tile_pipes = 8; in gfx_v8_0_gpu_early_init()1875 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1892 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1909 adev->gfx.config.max_tile_pipes = 4; in gfx_v8_0_gpu_early_init()1930 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v8_0_gpu_early_init()
807 unsigned max_tile_pipes; member
1228 adev->gfx.config.max_tile_pipes = in gfx_v9_0_gpu_early_init()
