Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance
1269 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1282 max_limits->sclk, in btc_adjust_clock_combinations()1289 max_limits->mclk, in btc_adjust_clock_combinations()2098 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2110 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2112 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2115 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2116 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2117 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2118 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
45 const struct radeon_clock_and_voltage_limits *max_limits,
789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
798 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local823 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()825 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()829 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()830 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()831 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()832 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3932 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3936 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3938 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2969 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3024 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3026 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3034 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3035 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3036 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3037 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()3038 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()3039 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()3040 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
2150 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2161 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2165 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2284 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2286 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3109 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local3125 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()3133 max_limits->mclk) in vega10_apply_state_adjust_rules()3135 max_limits->mclk; in vega10_apply_state_adjust_rules()3137 max_limits->sclk) in vega10_apply_state_adjust_rules()3139 max_limits->sclk; in vega10_apply_state_adjust_rules()3156 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()3157 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3173 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()3197 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()[all …]
2890 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local2905 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()2912 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()2913 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()2914 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()2915 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()2924 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()2925 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()2940 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()2966 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()[all …]
1598 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()1601 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()1602 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
930 struct amdgpu_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local955 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()957 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()961 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()962 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()963 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()964 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()4078 const struct amdgpu_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local4082 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()4084 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
3286 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument3299 max_limits->sclk, in btc_adjust_clock_combinations()3306 max_limits->mclk, in btc_adjust_clock_combinations()3429 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3484 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3486 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3494 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3495 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3496 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3497 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()[all …]
2218 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2229 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2233 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2352 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2354 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
