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Searched refs:mast (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv50.c129 u32 src, mast = nvkm_rd32(device, 0x00c040); in read_pll_ref() local
133 src = !!(mast & 0x00200000); in read_pll_ref()
136 src = !!(mast & 0x00400000); in read_pll_ref()
139 src = !!(mast & 0x00010000); in read_pll_ref()
142 src = !!(mast & 0x02000000); in read_pll_ref()
161 u32 mast = nvkm_rd32(device, 0x00c040); in read_pll() local
168 if (base == 0x004028 && (mast & 0x00100000)) { in read_pll()
197 u32 mast = nvkm_rd32(device, 0x00c040); in nv50_clk_read() local
212 switch (mast & 0x30000000) { in nv50_clk_read()
220 if (!(mast & 0x00100000)) in nv50_clk_read()
[all …]
Dmcp77.c86 u32 mast = nvkm_rd32(device, 0x00c054); in mcp77_clk_read() local
99 switch (mast & 0x000c0000) { in mcp77_clk_read()
109 switch (mast & 0x00000003) { in mcp77_clk_read()
117 if ((mast & 0x03000000) != 0x03000000) in mcp77_clk_read()
120 if ((mast & 0x00000200) == 0x00000000) in mcp77_clk_read()
123 switch (mast & 0x00000c00) { in mcp77_clk_read()
131 switch (mast & 0x00000030) { in mcp77_clk_read()
133 if (mast & 0x00000040) in mcp77_clk_read()
147 switch (mast & 0x00400000) { in mcp77_clk_read()
160 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in mcp77_clk_read()
[all …]
Dnv40.c102 u32 mast = nvkm_rd32(device, 0x00c040); in nv40_clk_read() local
110 return read_clk(clk, (mast & 0x00000003) >> 0); in nv40_clk_read()
112 return read_clk(clk, (mast & 0x00000030) >> 4); in nv40_clk_read()
119 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in nv40_clk_read()