Searched refs:lpsr (Results 1 – 3 of 3) sorted by relevance
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/ |
D | fsl,imx7d-pinctrl.txt | 4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low 5 power state retention capabilities on gpios that are part of iomuxc-lpsr 6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for 9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller. 11 iomuxc_lpsr: iomuxc-lpsr@302c0000 { 12 compatible = "fsl,imx7d-iomuxc-lpsr"; 22 Peripherals using pads from iomuxc-lpsr support low state retention power 30 "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller. 37 - fsl,input-sel: required property for iomuxc-lpsr controller, this property is 56 While iomuxc-lpsr is intended to be used by dedicated peripherals to take [all …]
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/Linux-v4.19/drivers/rtc/ |
D | rtc-snvs.c | 184 u32 lptar, lpsr; in snvs_rtc_read_alarm() local 189 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_read_alarm() 190 alrm->pending = (lpsr & SNVS_LPSR_LPTA) ? 1 : 0; in snvs_rtc_read_alarm() 239 u32 lpsr; in snvs_rtc_irq_handler() local 242 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_irq_handler() 244 if (lpsr & SNVS_LPSR_LPTA) { in snvs_rtc_irq_handler() 254 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr); in snvs_rtc_irq_handler()
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/Linux-v4.19/arch/arm/boot/dts/ |
D | imx7s.dtsi | 436 iomuxc_lpsr: iomuxc-lpsr@302c0000 { 437 compatible = "fsl,imx7d-iomuxc-lpsr";
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