| /Linux-v4.19/arch/arm/mach-imx/ |
| D | suspend-imx6.S | 81 ldr r11, [r0, #PM_INFO_MX6Q_L2_V_OFFSET]
87 ldr r6, [r11, #L2X0_CACHE_SYNC]
102 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET]
103 ldr r7, =PM_INFO_MMDC_IO_VAL_OFFSET
106 ldr r8, [r7], #0x4
107 ldr r9, [r7], #0x4
120 ldr r7, =MX6Q_MMDC_MPDGCTRL0
121 ldr r6, [r11, r7]
125 ldr r6, [r11, r7]
130 ldr r6, [r11, r7]
[all …]
|
| D | suspend-imx53.S | 50 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]
55 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]
58 ldr r5, [r2], #12 /* IOMUXC register offset */
59 ldr r6, [r3, r5] /* current value */
66 ldr r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET]
67 ldr r2,[r1, #M4IF_MCR0_OFFSET]
73 ldr r2,[r1, #M4IF_MCR0_OFFSET]
78 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]
83 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]
86 ldr r5, [r2], #4 /* IOMUXC register offset */
[all …]
|
| D | ssi-fiq.S | 45 ldr r12, .L_imx_ssi_fiq_base
48 ldr r13, .L_imx_ssi_fiq_tx_buffer
51 ldr r11, [r12, #SSI_SIER]
56 ldr r11, [r12, #SSI_SISR]
87 ldr r11, [r12, #SSI_SIER]
92 ldr r11, [r12, #SSI_SISR]
96 ldr r13, .L_imx_ssi_fiq_rx_buffer
104 ldr r11, [r12, #SSI_SACNT]
107 ldr r11, [r12, #SSI_SRX0]
110 ldr r11, [r12, #SSI_SRX0]
[all …]
|
| /Linux-v4.19/drivers/memory/ |
| D | ti-emif-sram-pm.S | 52 ldr r0, [r4, #EMIF_PM_BASE_ADDR_VIRT_OFFSET]
53 ldr r2, [r4, #EMIF_PM_REGS_VIRT_OFFSET]
56 ldr r1, [r0, #EMIF_SDRAM_CONFIG]
59 ldr r1, [r0, #EMIF_SDRAM_REFRESH_CONTROL]
62 ldr r1, [r0, #EMIF_SDRAM_TIMING_1]
65 ldr r1, [r0, #EMIF_SDRAM_TIMING_2]
68 ldr r1, [r0, #EMIF_SDRAM_TIMING_3]
71 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL]
74 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CTRL_SHDW]
77 ldr r1, [r0, #EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG]
[all …]
|
| /Linux-v4.19/arch/arm/mach-omap2/ |
| D | sleep43xx.S | 67 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET]
72 ldr r1, get_l2cache_base
85 ldr r1, kernel_flush
102 ldr r1, kernel_flush
118 ldr r3, [r4, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET]
121 ldr r0, [r2, #L2X0_AUX_CTRL]
123 ldr r0, [r2, #L310_PREFETCH_CTRL]
126 ldr r0, l2_val
129 ldr r0, [r2, #L2X0_CLEAN_INV_WAY]
130 ldr r1, l2_val
[all …]
|
| D | sleep34xx.S | 90 ldr r2, [r3] @ value for offset
157 ldr r4, omap3_do_wfi_sram_addr
158 ldr r5, [r4]
174 ldr r1, kernel_flush
193 ldr r1, kernel_flush
218 ldr r4, sdrc_power @ read the SDRC_POWER register
219 ldr r5, [r4] @ read the contents of SDRC_POWER
264 ldr r4, cm_idlest_ckgen
266 ldr r5, [r4]
270 ldr r4, cm_idlest1_core
[all …]
|
| D | sleep33xx.S | 35 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET]
46 ldr r1, kernel_flush
62 ldr r1, kernel_flush
66 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET]
67 ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET]
76 ldr r3, [r9, #EMIF_PM_ENTER_SR_OFFSET]
84 ldr r3, [r9, #EMIF_PM_SAVE_CONTEXT_OFFSET]
93 ldr r1, virt_emif_clkctrl
94 ldr r2, [r1]
98 ldr r1, virt_emif_clkctrl
[all …]
|
| D | sleep44xx.S | 71 ldr r9, [r0, #OMAP_TYPE_OFFSET]
77 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
105 ldr r9, [r8, #OMAP_TYPE_OFFSET]
114 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
159 ldr r0, =0xffff
162 ldr r0, [r2, #L2X0_CLEAN_INV_WAY]
163 ldr r1, =0xffff
177 ldr r0, [r2, #L2X0_CACHE_SYNC]
208 ldr r9, [r8, #OMAP_TYPE_OFFSET]
214 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
[all …]
|
| D | sram242x.S | 51 ldr r2, omap242x_sdi_cm_clksel2_pll @ get address of dpllout reg
60 ldr r11, omap242x_sdi_sdrc_dlla_ctrl @ addr of dlla ctrl
61 ldr r10, [r11] @ get current val
73 ldr r10, [r11] @ get locked value
111 ldr r4, omap242x_sdi_prcm_voltctrl @ get addr of volt ctrl.
112 ldr r5, [r4] @ get value.
113 ldr r6, prcm_mask_val @ get value of mask
121 ldr r3, omap242x_sdi_timer_32ksynct_cr @ get addr of counter
122 ldr r5, [r3] @ get value
125 ldr r7, [r3] @ get timer value
[all …]
|
| D | sram243x.S | 51 ldr r2, omap243x_sdi_cm_clksel2_pll @ get address of dpllout reg
60 ldr r11, omap243x_sdi_sdrc_dlla_ctrl @ addr of dlla ctrl
61 ldr r10, [r11] @ get current val
73 ldr r10, [r11] @ get locked value
111 ldr r4, omap243x_sdi_prcm_voltctrl @ get addr of volt ctrl.
112 ldr r5, [r4] @ get value.
113 ldr r6, prcm_mask_val @ get value of mask
121 ldr r3, omap243x_sdi_timer_32ksynct_cr @ get addr of counter
122 ldr r5, [r3] @ get value
125 ldr r7, [r3] @ get timer value
[all …]
|
| D | omap-headsmp.S | 46 wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
47 ldr r0, [r2]
62 wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
63 ldr r0, [r2]
69 ldr r12, =API_HYP_ENTRY
83 hold: ldr r12,=0x103
100 hold_2: ldr r12,=0x103
124 ldr r1, =OMAP44XX_GIC_DIST_BASE
125 ldr r0, [r1]
|
| /Linux-v4.19/arch/arm/mach-at91/ |
| D | pm_suspend.S | 30 1: ldr tmp1, [pmc, #AT91_PMC_SR]
39 1: ldr tmp1, [pmc, #AT91_PMC_SR]
48 1: ldr tmp1, [pmc, #AT91_PMC_SR]
57 1: ldr tmp1, [pmc, #AT91_PMC_SR]
99 ldr tmp1, [r0, #PM_DATA_PMC]
101 ldr tmp1, [r0, #PM_DATA_RAMC0]
103 ldr tmp1, [r0, #PM_DATA_RAMC1]
105 ldr tmp1, [r0, #PM_DATA_MEMCTRL]
107 ldr tmp1, [r0, #PM_DATA_MODE]
110 ldr tmp1, [r0, #PM_DATA_SHDWC]
[all …]
|
| /Linux-v4.19/arch/arm/mach-exynos/ |
| D | sleep.S | 37 ldr r1, =CPU_MASK
39 ldr r1, =CPU_CORTEX_A9
50 ldr r1, =CPU_MASK
52 ldr r1, =CPU_CORTEX_A9
57 ldr r1, [r0]
58 ldr r1, [r0, r1]
60 ldr r2, [r0]
61 ldr r2, [r0, r2]
67 ldr r2, [r0]
71 ldr r1, [r0, #L2X0_R_PHY_BASE]
[all …]
|
| /Linux-v4.19/drivers/soc/bcm/brcmstb/pm/ |
| D | s2-arm.S | 38 ldr r0, [DDR_PHY_STATUS_REG]
41 ldr r0, =PM_S2_COMMAND
42 ldr r1, =0
44 ldr r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
46 ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
53 1: ldr r0, [DDR_PHY_STATUS_REG]
58 ldr r0, =1
60 ldr r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS]
62 ldr r0, =0
64 ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
[all …]
|
| /Linux-v4.19/arch/arm/mach-davinci/ |
| D | sleep.S | 55 ldr ip, CACHE_FLUSH
65 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
70 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
85 ldr ip, [r3, #PLLDIV1]
90 ldr ip, [r3, #PLLCTL]
101 ldr ip, [r3, #PLLCTL]
106 ldr ip, [r4]
114 ldr ip, [r4]
121 ldr ip, [r3, #PLLCTL]
126 ldr ip, [r3, #PLLCTL]
[all …]
|
| /Linux-v4.19/arch/arm/lib/ |
| D | io-readsw-armv3.S | 24 ldr r3, [r0]
45 .Linsw_8_lp: ldr r3, [r0]
47 ldr r4, [r0]
50 ldr r4, [r0]
52 ldr r5, [r0]
55 ldr r5, [r0]
57 ldr r6, [r0]
60 ldr r6, [r0]
62 ldr lr, [r0]
76 ldr r3, [r0]
[all …]
|
| /Linux-v4.19/arch/arm/kernel/ |
| D | entry-ftrace.S | 67 ldr r0, =ftrace_trace_function
68 ldr r2, [r0]
74 ldr r1, =ftrace_graph_return
75 ldr r2, [r1]
79 ldr r1, =ftrace_graph_entry
80 ldr r2, [r1]
81 ldr r0, =ftrace_graph_entry_stub
107 ldr lr, [sp, #8] @ get previous LR
120 ldr r2, =function_trace_op
121 ldr r2, [r2] @ pointer to the current
[all …]
|
| D | head-nommu.S | 65 ldr r9, =BASEADDR_V7M_SCB
66 ldr r9, [r9, V7M_SCB_CPUID]
68 ldr r9, =CONFIG_PROCESSOR_ID
79 ldr r12, [r10, #PROCINFO_INITFUNC]
82 1: ldr lr, =__mmap_switched
102 ldr r9, =CONFIG_PROCESSOR_ID
110 ldr r7, __secondary_data
117 ldr r12, [r10, #PROCINFO_INITFUNC]
121 ldr sp, [r7, #12] @ set up the stack pointer
139 M_CLASS(ldr r3, [r12, 0x50])
[all …]
|
| /Linux-v4.19/arch/arm/mach-tegra/ |
| D | sleep-tegra30.S | 84 ldr \rd, [\base, #EMC_ADR_CFG]
94 ldr \rd, [\base, #EMC_EMC_STATUS]
100 ldr \rd, [\r_car_base, #\pll_base]
106 ldr \rd, [\r_car_base, #\pll_misc]
109 ldr \rd, [\r_car_base, #\pll_misc]
110 ldr \rd, [\r_car_base, #\pll_misc]
118 ldr \rd, [\r_car_base, #\pll_base]
124 ldr \rd, [\car, #\iddq]
130 ldr \rd, [\car, #\iddq]
195 ldr r3, [r1] @ read CSR
[all …]
|
| D | sleep-tegra20.S | 58 ldr \rd, [\r_car_base, #\pll_base]
65 ldr \rd, [\base, #EMC_ADR_CFG]
102 ldr r2, =__tegra20_cpu1_resettable_status_offset
107 ldr r3, =TEGRA_FLOW_CTRL_VIRT
110 ldr r2, [r3, r1]
115 ldr r3, =TEGRA_CLK_RESET_VIRT
163 ldr r12, [r3]
192 ldr r2, =__tegra20_cpu1_resettable_status_offset
206 ldr r2, =__tegra20_cpu1_resettable_status_offset
220 ldr r2, =__tegra20_cpu1_resettable_status_offset
[all …]
|
| /Linux-v4.19/arch/arm/mach-pxa/ |
| D | standby.S | 22 ldr r0, =PSSR
26 ldr ip, [r3]
62 ldr r2, [r1] @ Dummy read PXA3_MDCNFG
69 ldr r0, [r1, #PXA3_DDR_HCAL] @ Clear (and wait for) HCEN
72 1: ldr r0, [r1, #PXA3_DDR_HCAL]
76 ldr r0, [r1, #PXA3_RCOMP] @ Initiate RCOMP
83 ldr r0, [r1, #PXA3_DMCIER] @ set DMIER[EDLP]
87 ldr r0, [r1, #PXA3_DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN
92 1: ldr r0, [r1, #PXA3_DMCISR]
96 ldr r0, [r1, #PXA3_MDCNFG] @ set PXA3_MDCNFG[DMCEN]
[all …]
|
| /Linux-v4.19/arch/arm/crypto/ |
| D | sha1-armv4-large.S | 74 ldr r8,.LK_00_19
93 ldr r9,[r1],#4 @ handles unaligned
118 ldr r9,[r1],#4 @ handles unaligned
143 ldr r9,[r1],#4 @ handles unaligned
168 ldr r9,[r1],#4 @ handles unaligned
193 ldr r9,[r1],#4 @ handles unaligned
221 ldr r9,[r1],#4 @ handles unaligned
234 ldr r9,[r14,#15*4]
235 ldr r10,[r14,#13*4]
236 ldr r11,[r14,#7*4]
[all …]
|
| /Linux-v4.19/arch/arm/mach-prima2/ |
| D | sleep.S | 22 ldr r0, =sirfsoc_memc_base
23 ldr r5, [r0]
25 ldr r0, =sirfsoc_pwrc_base
26 ldr r6, [r0]
28 ldr r0, =sirfsoc_rtciobrg_base
29 ldr r7, [r0]
43 ldr r2, [r5, #DENALI_CTL_22_OFF]
52 ldr r4, [r5, #DENALI_CTL_112_OFF]
61 ldr r3, [r7]
|
| /Linux-v4.19/arch/arm/mach-sa1100/ |
| D | sleep.S | 36 ldr r6, =MDREFR
37 ldr r4, [r6]
39 ldr r5, =PPCR
81 ldr r0, =MSC0
82 ldr r1, =MSC1
83 ldr r2, =MSC2
85 ldr r3, [r0]
89 ldr r4, [r1]
93 ldr r5, [r2]
97 ldr r7, [r6]
[all …]
|
| /Linux-v4.19/arch/arm/boot/compressed/ |
| D | head-sharpsl.S | 28 ldr r7, .TOSAID
38 ldr r3, .PXA270ID
43 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset
54 ldr r6, [r1, #0] @ Load Chip ID
55 ldr r3, .W100ID
56 ldr r7, .POODLEID
61 ldr r7, .CORGIID
62 ldr r3, .PXA255ID
68 ldr r7, .SHEPHERDID
73 ldr r7, .HUSKYID @ Must be Husky
[all …]
|
