Searched refs:lcd_info (Results 1 – 4 of 4) sorted by relevance
113 lcd_info __attribute__((aligned(8))) __read_mostly =126 #define LCD_CMD_REG lcd_info.lcd_cmd_reg_addr 127 #define LCD_DATA_REG lcd_info.lcd_data_reg_addr 128 #define LED_DATA_REG lcd_info.lcd_cmd_reg_addr /* LASI & ASP only */320 &lcd_info.heartbeat, in led_LCD_driver()321 &lcd_info.disk_io, in led_LCD_driver()322 &lcd_info.lan_rcv, in led_LCD_driver()323 &lcd_info.lan_tx in led_LCD_driver()327 unsigned int msec_cmd_delay = 1 + (lcd_info.min_cmd_delay / 1000); in led_LCD_driver()534 if (lcd_info.model == DISPLAY_MODEL_LCD) in led_halt()[all …]
1174 uint16_t lcd_info; in radeon_combios_get_lvds_info() local1180 lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE); in radeon_combios_get_lvds_info()1182 if (lcd_info) { in radeon_combios_get_lvds_info()1189 stmp[i] = RBIOS8(lcd_info + i + 1); in radeon_combios_get_lvds_info()1194 lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19); in radeon_combios_get_lvds_info()1195 lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b); in radeon_combios_get_lvds_info()1200 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); in radeon_combios_get_lvds_info()1203 lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24); in radeon_combios_get_lvds_info()1204 lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf; in radeon_combios_get_lvds_info()1205 lvds->panel_blon_delay = (RBIOS16(lcd_info + 0x38) >> 4) & 0xf; in radeon_combios_get_lvds_info()[all …]
1008 if (!DATA_TABLES(lcd_info)) in get_embedded_panel_info_v2_1()1011 lvds = GET_IMAGE(struct lcd_info_v2_1, DATA_TABLES(lcd_info)); in get_embedded_panel_info_v2_1()1098 if (!DATA_TABLES(lcd_info)) in bios_parser_get_embedded_panel_info()1102 DATA_TABLES(lcd_info)); in bios_parser_get_embedded_panel_info()
388 uint16_t lcd_info; /* Shared by various SW components */ member
