/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v6_0.c | 490 u32 lb_size; /* line buffer allocated to pipe */ member 774 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v6_0_check_latency_hiding() 811 u32 lb_size, u32 num_heads) in dce_v6_0_program_watermarks() argument 859 wm_high.lb_size = lb_size; in dce_v6_0_program_watermarks() 886 wm_low.lb_size = lb_size; in dce_v6_0_program_watermarks() 938 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v6_0_program_watermarks() 1047 u32 num_heads = 0, lb_size; in dce_v6_0_bandwidth_update() local 1062 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); in dce_v6_0_bandwidth_update() 1063 dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i], lb_size, num_heads); in dce_v6_0_bandwidth_update() 1064 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); in dce_v6_0_bandwidth_update() [all …]
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D | dce_v8_0.c | 628 u32 lb_size; /* line buffer allocated to pipe */ member 912 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v8_0_check_latency_hiding() 949 u32 lb_size, u32 num_heads) in dce_v8_0_program_watermarks() argument 988 wm_high.lb_size = lb_size; in dce_v8_0_program_watermarks() 1027 wm_low.lb_size = lb_size; in dce_v8_0_program_watermarks() 1042 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v8_0_program_watermarks() 1084 u32 num_heads = 0, lb_size; in dce_v8_0_bandwidth_update() local 1095 lb_size = dce_v8_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v8_0_bandwidth_update() 1097 lb_size, num_heads); in dce_v8_0_bandwidth_update()
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D | dce_v11_0.c | 719 u32 lb_size; /* line buffer allocated to pipe */ member 1003 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v11_0_check_latency_hiding() 1040 u32 lb_size, u32 num_heads) in dce_v11_0_program_watermarks() argument 1079 wm_high.lb_size = lb_size; in dce_v11_0_program_watermarks() 1118 wm_low.lb_size = lb_size; in dce_v11_0_program_watermarks() 1133 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v11_0_program_watermarks() 1173 u32 num_heads = 0, lb_size; in dce_v11_0_bandwidth_update() local 1184 lb_size = dce_v11_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v11_0_bandwidth_update() 1186 lb_size, num_heads); in dce_v11_0_bandwidth_update()
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D | dce_v10_0.c | 693 u32 lb_size; /* line buffer allocated to pipe */ member 977 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v10_0_check_latency_hiding() 1014 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument 1053 wm_high.lb_size = lb_size; in dce_v10_0_program_watermarks() 1092 wm_low.lb_size = lb_size; in dce_v10_0_program_watermarks() 1107 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v10_0_program_watermarks() 1147 u32 num_heads = 0, lb_size; in dce_v10_0_bandwidth_update() local 1158 lb_size = dce_v10_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v10_0_bandwidth_update() 1160 lb_size, num_heads); in dce_v10_0_bandwidth_update()
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/Linux-v4.19/drivers/scsi/ |
D | scsi_debug.c | 2525 u32 lb_size = sdebug_sector_size; in comp_write_worker() local 2531 res = !memcmp(fake_storep + (block * lb_size), arr, in comp_write_worker() 2532 (num - rest) * lb_size); in comp_write_worker() 2536 res = memcmp(fake_storep, arr + ((num - rest) * lb_size), in comp_write_worker() 2537 rest * lb_size); in comp_write_worker() 2540 arr += num * lb_size; in comp_write_worker() 2541 memcpy(fake_storep + (block * lb_size), arr, (num - rest) * lb_size); in comp_write_worker() 2543 memcpy(fake_storep, arr + ((num - rest) * lb_size), in comp_write_worker() 2544 rest * lb_size); in comp_write_worker() 3107 u32 lb_size = sdebug_sector_size; in resp_write_scat() local [all …]
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/Linux-v4.19/drivers/gpu/drm/radeon/ |
D | evergreen.c | 1939 u32 lb_size; /* line buffer allocated to pipe */ member 2124 u32 lb_partitions = wm->lb_size / wm->src_width; in evergreen_check_latency_hiding() 2150 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument 2198 wm_high.lb_size = lb_size; in evergreen_program_watermarks() 2225 wm_low.lb_size = lb_size; in evergreen_program_watermarks() 2276 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in evergreen_program_watermarks() 2321 u32 num_heads = 0, lb_size; in evergreen_bandwidth_update() local 2336 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update() 2337 evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in evergreen_bandwidth_update() 2338 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update() [all …]
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D | rs690.c | 210 u32 lb_size = 8192; in rs690_line_buffer_adjust() local 251 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in rs690_line_buffer_adjust() 254 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in rs690_line_buffer_adjust()
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D | si.c | 2065 u32 lb_size; /* line buffer allocated to pipe */ member 2270 u32 lb_partitions = wm->lb_size / wm->src_width; in dce6_check_latency_hiding() 2296 u32 lb_size, u32 num_heads) in dce6_program_watermarks() argument 2347 wm_high.lb_size = lb_size; in dce6_program_watermarks() 2374 wm_low.lb_size = lb_size; in dce6_program_watermarks() 2427 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce6_program_watermarks() 2464 u32 num_heads = 0, lb_size; in dce6_bandwidth_update() local 2479 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update() 2480 dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce6_bandwidth_update() 2481 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update() [all …]
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D | cik.c | 8927 u32 lb_size; /* line buffer allocated to pipe */ member 9211 u32 lb_partitions = wm->lb_size / wm->src_width; in dce8_check_latency_hiding() 9248 u32 lb_size, u32 num_heads) in dce8_program_watermarks() argument 9288 wm_high.lb_size = lb_size; in dce8_program_watermarks() 9328 wm_low.lb_size = lb_size; in dce8_program_watermarks() 9345 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce8_program_watermarks() 9385 u32 num_heads = 0, lb_size; in dce8_bandwidth_update() local 9399 lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); in dce8_bandwidth_update() 9400 dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce8_bandwidth_update()
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D | r100.c | 3214 u32 lb_size = 8192; in r100_bandwidth_update() local 3639 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in r100_bandwidth_update() 3642 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in r100_bandwidth_update()
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