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/Linux-v4.19/arch/arm64/crypto/
Dspeck-neon-core.S86 .macro _speck_round_128bytes n, lanes
95 add X_0.\lanes, X_0.\lanes, Y_0.\lanes
96 add X_1.\lanes, X_1.\lanes, Y_1.\lanes
97 add X_2.\lanes, X_2.\lanes, Y_2.\lanes
98 add X_3.\lanes, X_3.\lanes, Y_3.\lanes
107 shl TMP0.\lanes, Y_0.\lanes, #3
108 shl TMP1.\lanes, Y_1.\lanes, #3
109 shl TMP2.\lanes, Y_2.\lanes, #3
110 shl TMP3.\lanes, Y_3.\lanes, #3
111 sri TMP0.\lanes, Y_0.\lanes, #(\n - 3)
[all …]
/Linux-v4.19/drivers/staging/media/omap4iss/
Diss_csiphy.c40 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
42 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
48 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
49 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
127 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
132 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
179 if (lanes->data[i].pos == 0) in omap4iss_csiphy_config()
182 if (lanes->data[i].pol > 1 || in omap4iss_csiphy_config()
183 lanes->data[i].pos > (csi2->phy->max_data_lanes + 1)) in omap4iss_csiphy_config()
186 if (used_lanes & (1 << lanes->data[i].pos)) in omap4iss_csiphy_config()
[all …]
/Linux-v4.19/drivers/media/platform/omap3isp/
Dispcsiphy.c169 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
177 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
180 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
189 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
192 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
195 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
198 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
201 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
247 reg |= (lanes->data[i].pol << in omap3isp_csiphy_config()
249 reg |= (lanes->data[i].pos << in omap3isp_csiphy_config()
[all …]
/Linux-v4.19/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c51 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
82 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
114 int lanes, ret; in adv7533_mode_set() local
120 lanes = 4; in adv7533_mode_set()
122 lanes = 3; in adv7533_mode_set()
124 if (lanes != dsi->lanes) { in adv7533_mode_set()
126 dsi->lanes = lanes; in adv7533_mode_set()
173 dsi->lanes = adv->num_dsi_lanes; in adv7533_attach_dsi()
/Linux-v4.19/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v4.19/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v4.19/drivers/nubus/
Dproc.c73 int lanes = board->lanes; in nubus_proc_add_rsrc_dir() local
78 return proc_mkdir_data(name, 0555, procdir, (void *)lanes); in nubus_proc_add_rsrc_dir()
120 int lanes = (int)proc_get_parent_data(inode); in nubus_proc_rsrc_show() local
123 if (!lanes) in nubus_proc_rsrc_show()
126 ent.mask = lanes; in nubus_proc_rsrc_show()
/Linux-v4.19/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
54 the pad and any of its lanes, this property must be set to "okay".
101 Each pad node has a child named "lanes" that contains one or more children of
102 its own, each representing one of the lanes controlled by the pad.
238 lanes {
[all …]
/Linux-v4.19/arch/arm64/boot/dts/nvidia/
Dtegra210-p2371-2180.dts22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
/Linux-v4.19/drivers/phy/tegra/
Dxusb.c43 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
46 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
47 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
93 struct device_node *np, *lanes; in tegra_xusb_pad_find_phy_node() local
95 lanes = of_get_child_by_name(pad->dev.of_node, "lanes"); in tegra_xusb_pad_find_phy_node()
96 if (!lanes) in tegra_xusb_pad_find_phy_node()
99 np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); in tegra_xusb_pad_find_phy_node()
100 of_node_put(lanes); in tegra_xusb_pad_find_phy_node()
189 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
191 if (!pad->lanes) { in tegra_xusb_pad_register()
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/Linux-v4.19/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt96 - If lanes 0 to 3 are used:
99 - If lanes 4 or 5 are used:
152 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
154 - Root port 0 uses 4 lanes, root port 1 is unused.
155 - Both root ports use 2 lanes.
161 number of lanes in the nvidia,num-lanes property. Entries are of the form
162 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
214 nvidia,num-lanes = <2>;
228 nvidia,num-lanes = <2>;
320 nvidia,num-lanes = <2>;
[all …]
Ddesignware-pcie.txt11 - num-lanes: number of lanes to use
26 - num-lanes: number of lanes to use (this property should be specified unless
58 num-lanes = <1>;
69 num-lanes = <1>;
Drockchip-pcie-ep.txt29 - phy-names: Must include 4 entries for all 4 lanes even if some of
37 - num-lanes: number of lanes to use
50 num-lanes = <4>;
/Linux-v4.19/drivers/gpu/drm/rockchip/
Dcdn-dp-core.c156 u8 lanes; in cdn_dp_get_port_lanes() local
163 lanes = 2; in cdn_dp_get_port_lanes()
165 lanes = 4; in cdn_dp_get_port_lanes()
167 lanes = 0; in cdn_dp_get_port_lanes()
170 return lanes; in cdn_dp_get_port_lanes()
190 int i, lanes; in cdn_dp_connected_port() local
194 lanes = cdn_dp_get_port_lanes(port); in cdn_dp_connected_port()
195 if (lanes) in cdn_dp_connected_port()
292 u8 lanes, bpc; in cdn_dp_connector_mode_valid() local
312 source_max = dp->lanes; in cdn_dp_connector_mode_valid()
[all …]
/Linux-v4.19/arch/arm/boot/dts/
Domap3-n9.dts34 clock-lanes = <0>;
35 data-lanes = <1 2>;
57 clock-lanes = <2>;
58 data-lanes = <1 3>;
Dimx6dl-sabresd.dts16 clock-lanes = <0>;
17 data-lanes = <1 2>;
/Linux-v4.19/Documentation/devicetree/bindings/media/i2c/
Dov2680.txt22 - clock-lanes: should be set to <0> (clock lane on hardware lane 0).
23 - data-lanes: should be set to <1> (one CSI-2 lane supported).
41 clock-lanes = <0>;
42 data-lanes = <1>;
Dtc358743.txt16 - data-lanes: should be <1 2 3 4> for four-lane operation,
18 - clock-lanes: should be <0>
42 data-lanes = <1 2 3 4>;
43 clock-lanes = <0>;
Dnokia,smia.txt40 - clock-lanes: <0>
41 - data-lanes: <1..n>
62 clock-lanes = <0>;
63 data-lanes = <1 2>;
Dadv748x.txt80 clock-lanes = <0>;
81 data-lanes = <1 2 3 4>;
90 clock-lanes = <0>;
91 data-lanes = <1>;
Dov5640.txt29 - clock-lanes: should be set to <0> (clock lane on hardware lane 0)
30 - data-lanes: should be set to <1> or <1 2> (one or two CSI-2 lanes supported)
64 clock-lanes = <0>;
65 data-lanes = <1 2>;
/Linux-v4.19/Documentation/devicetree/bindings/media/
Dsamsung-mipi-csis.txt13 - bus-width : maximum number of data lanes supported (SoC specific);
42 - data-lanes : (required) an array specifying active physical MIPI-CSI2
43 data input lanes and their mapping to logical lanes; the
77 data-lanes = <1>, <2>;
/Linux-v4.19/drivers/gpu/drm/hisilicon/kirin/
Ddw_drm_dsi.c88 u32 lanes; member
330 u32 lanes) in dsi_set_phy_timer() argument
337 val = (lanes - 1) | (PHY_STOP_WAIT_TIME << 8); in dsi_set_phy_timer()
363 u32 lanes) in dsi_set_mipi_phy() argument
370 dsi_set_phy_timer(base, phy, lanes); in dsi_set_mipi_phy()
394 for (i = 0; i < lanes; i++) { in dsi_set_mipi_phy()
547 dphy_req_kHz = mode->clock * bpp / dsi->lanes; in dsi_mipi_init()
554 dsi_set_mipi_phy(base, phy, dsi->lanes); in dsi_mipi_init()
566 dsi->lanes, mode->clock, phy->lane_byte_clk_kHz); in dsi_mipi_init()
617 req_kHz = mode->clock * bpp / dsi->lanes; in dsi_encoder_phy_mode_valid()
[all …]
/Linux-v4.19/drivers/gpu/drm/vc4/
Dvc4_dsi.c521 u32 lanes; member
742 (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) | in vc4_dsi_ulps()
743 (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) | in vc4_dsi_ulps()
744 (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0)); in vc4_dsi_ulps()
747 (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) | in vc4_dsi_ulps()
748 (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) | in vc4_dsi_ulps()
749 (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0)); in vc4_dsi_ulps()
752 (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) | in vc4_dsi_ulps()
753 (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) | in vc4_dsi_ulps()
754 (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0)); in vc4_dsi_ulps()
[all …]
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
40 Each subnode describes groups of lanes along with parameters and pads that
54 - nvidia,lanes: An array of strings. Each string is the name of a lane.
62 Note that not all of these properties are valid for all lanes. Lanes can be
117 nvidia,lanes = "pcie-0", "pcie-1";
123 nvidia,lanes = "pcie-2", "pcie-3",
130 nvidia,lanes = "sata-0";

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