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Searched refs:lane_base (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_10nm.c24 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_config_lpcdrx() local
32 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx()
35 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx()
43 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_lane_settings() local
47 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings()
54 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPRX_CTRL(i), 0); in dsi_phy_hw_v3_0_lane_settings()
55 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_PIN_SWAP(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
56 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_HSTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings()
64 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG0(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
65 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG1(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
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Ddsi_phy_14nm.c23 void __iomem *base = phy->lane_base; in dsi_14nm_dphy_set_timing()
64 void __iomem *lane_base = phy->lane_base; in dsi_14nm_phy_enable() local
81 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_VREG_CNTRL(i), in dsi_14nm_phy_enable()
84 dsi_phy_write(lane_base + in dsi_14nm_phy_enable()
86 dsi_phy_write(lane_base + in dsi_14nm_phy_enable()
90 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG3(i), in dsi_14nm_phy_enable()
92 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG2(i), 0x10); in dsi_14nm_phy_enable()
93 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_DATAPATH(i), in dsi_14nm_phy_enable()
95 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_STR(i), in dsi_14nm_phy_enable()
142 phy->lane_base = msm_ioremap(pdev, "dsi_phy_lane", in dsi_14nm_phy_init()
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Ddsi_phy.h82 void __iomem *lane_base; member