Searched refs:l2x0_base (Results 1 – 6 of 6) sorted by relevance
| /Linux-v4.19/arch/arm/mach-imx/ |
| D | system.c | 97 void __iomem *l2x0_base; in imx_init_l2cache() local
105 l2x0_base = of_iomap(np, 0); in imx_init_l2cache()
106 if (!l2x0_base) in imx_init_l2cache()
109 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { in imx_init_l2cache()
111 val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); in imx_init_l2cache()
120 writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); in imx_init_l2cache()
123 iounmap(l2x0_base); in imx_init_l2cache()
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| D | mm-imx3.c | 87 void __iomem *l2x0_base; in imx3_init_l2x0() local
108 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); in imx3_init_l2x0()
109 if (!l2x0_base) { in imx3_init_l2x0()
114 l2x0_init(l2x0_base, 0x00030024, 0x00000000); in imx3_init_l2x0()
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| /Linux-v4.19/arch/arm/mach-ux500/ |
| D | cpu-db8500.c | 40 void __iomem *l2x0_base; in ux500_l2x0_unlock() local
43 l2x0_base = of_iomap(np, 0); in ux500_l2x0_unlock()
45 if (!l2x0_base) in ux500_l2x0_unlock()
56 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + in ux500_l2x0_unlock()
58 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + in ux500_l2x0_unlock()
61 iounmap(l2x0_base); in ux500_l2x0_unlock()
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| /Linux-v4.19/arch/arm/mm/ |
| D | cache-l2x0.c | 51 static void __iomem *l2x0_base; variable
146 void __iomem *base = l2x0_base; in l2c_disable()
157 l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); in l2c_save()
162 void __iomem *base = l2x0_base; in l2c_resume()
201 void __iomem *base = l2x0_base; in l2c210_inv_range()
220 void __iomem *base = l2x0_base; in l2c210_clean_range()
229 void __iomem *base = l2x0_base; in l2c210_flush_range()
238 void __iomem *base = l2x0_base; in l2c210_flush_all()
248 __l2c210_cache_sync(l2x0_base); in l2c210_sync()
321 void __iomem *base = l2x0_base; in l2c220_inv_range()
[all …]
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| D | cache-l2x0-pmu.c | 32 static void __iomem *l2x0_base; variable
78 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT0_CFG - 4 * idx); in l2x0_pmu_counter_config_write()
83 return readl_relaxed(l2x0_base + L2X0_EVENT_CNT0_VAL - 4 * idx); in l2x0_pmu_counter_read()
88 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT0_VAL - 4 * idx); in l2x0_pmu_counter_write()
93 u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_enable()
95 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_enable()
100 u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_disable()
102 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_disable()
520 l2x0_base = base; in l2x0_pmu_register()
527 if (!l2x0_base) in l2x0_pmu_init()
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| /Linux-v4.19/arch/arm/mach-omap2/ |
| D | omap-mpuss-lowpower.c | 202 void __iomem *l2x0_base = omap4_get_l2cache_base(); in save_l2x0_context() local
204 if (l2x0_base && sar_base) { in save_l2x0_context()
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