| /Linux-v4.19/drivers/staging/vt6655/ |
| D | mac.h | 543 #define MACvRegBitsOn(iobase, byRegOfs, byBits) \ argument
546 VNSvInPortB(iobase + byRegOfs, &byData); \
547 VNSvOutPortB(iobase + byRegOfs, byData | (byBits)); \
550 #define MACvWordRegBitsOn(iobase, byRegOfs, wBits) \ argument
553 VNSvInPortW(iobase + byRegOfs, &wData); \
554 VNSvOutPortW(iobase + byRegOfs, wData | (wBits)); \
557 #define MACvDWordRegBitsOn(iobase, byRegOfs, dwBits) \ argument
560 VNSvInPortD(iobase + byRegOfs, &dwData); \
561 VNSvOutPortD(iobase + byRegOfs, dwData | (dwBits)); \
564 #define MACvRegBitsOnEx(iobase, byRegOfs, byMask, byBits) \ argument
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| D | srom.c | 62 unsigned char SROMbyReadEmbedded(void __iomem *iobase, in SROMbyReadEmbedded() argument
71 VNSvInPortB(iobase + MAC_REG_I2MCFG, &byOrg); in SROMbyReadEmbedded()
73 VNSvOutPortB(iobase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); in SROMbyReadEmbedded()
75 VNSvOutPortB(iobase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); in SROMbyReadEmbedded()
76 VNSvOutPortB(iobase + MAC_REG_I2MTGAD, byContntOffset); in SROMbyReadEmbedded()
79 VNSvOutPortB(iobase + MAC_REG_I2MCSR, I2MCSR_EEMR); in SROMbyReadEmbedded()
82 VNSvInPortB(iobase + MAC_REG_I2MCSR, &byWait); in SROMbyReadEmbedded()
92 VNSvInPortB(iobase + MAC_REG_I2MDIPT, &byData); in SROMbyReadEmbedded()
93 VNSvOutPortB(iobase + MAC_REG_I2MCFG, byOrg); in SROMbyReadEmbedded()
109 void SROMvReadAllContents(void __iomem *iobase, unsigned char *pbyEepromRegs) in SROMvReadAllContents() argument
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| /Linux-v4.19/drivers/staging/comedi/drivers/ |
| D | ni_atmio16d.c | 153 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); in reset_counters()
154 outw(0xFF02, dev->iobase + AM9513A_COM_REG); in reset_counters()
155 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
156 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); in reset_counters()
157 outw(0x3, dev->iobase + AM9513A_DATA_REG); in reset_counters()
158 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
159 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
161 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); in reset_counters()
162 outw(0xFF03, dev->iobase + AM9513A_COM_REG); in reset_counters()
163 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
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| D | adv_pci_dio.c | 214 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_b() local
216 data[1] = inb(iobase); in pci_dio_insn_bits_di_b()
218 data[1] |= (inb(iobase + 1) << 8); in pci_dio_insn_bits_di_b()
220 data[1] |= (inb(iobase + 2) << 16); in pci_dio_insn_bits_di_b()
222 data[1] |= (inb(iobase + 3) << 24); in pci_dio_insn_bits_di_b()
233 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_w() local
235 data[1] = inw(iobase); in pci_dio_insn_bits_di_w()
237 data[1] |= (inw(iobase + 2) << 16); in pci_dio_insn_bits_di_w()
248 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_do_b() local
251 outb(s->state & 0xff, iobase); in pci_dio_insn_bits_do_b()
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| D | ni_daq_700.c | 85 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits()
89 val |= inb(dev->iobase + DIO_R) << 8; in daq700_dio_insn_bits()
120 status = inb(dev->iobase + STA_R2); in daq700_ai_eoc()
123 status = inb(dev->iobase + STA_R1); in daq700_ai_eoc()
149 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); in daq700_ai_rinsn()
153 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn()
160 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ in daq700_ai_rinsn()
161 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ in daq700_ai_rinsn()
162 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ in daq700_ai_rinsn()
164 inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn()
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| D | addi_apci_1564.c | 175 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_reset()
176 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG); in apci1564_reset()
177 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG); in apci1564_reset()
178 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG); in apci1564_reset()
181 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset()
182 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG); in apci1564_reset()
185 addi_watchdog_reset(dev->iobase + APCI1564_WDOG_IOBASE); in apci1564_reset()
192 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG; in apci1564_reset() local
195 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset()
196 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset()
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| D | dmm32at.c | 167 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
171 dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
173 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec()
174 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec()
175 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec()
183 val = inb(dev->iobase + DMM32AT_AI_LSB_REG); in dmm32at_ai_get_sample()
184 val |= (inb(dev->iobase + DMM32AT_AI_MSB_REG) << 8); in dmm32at_ai_get_sample()
197 status = inb(dev->iobase + context); in dmm32at_ai_status()
220 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read()
344 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer()
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| D | addi_apci_3501.c | 100 status = inl(dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_wait_for_dac()
124 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
128 dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
147 dev->iobase + APCI3501_AO_DATA_REG); in apci3501_ao_insn_write()
160 data[1] = inl(dev->iobase + APCI3501_DI_REG) & 0x3; in apci3501_di_insn_bits()
170 s->state = inl(dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
173 outl(s->state, dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
180 static void apci3501_eeprom_wait(unsigned long iobase) in apci3501_eeprom_wait() argument
185 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait()
189 static unsigned short apci3501_eeprom_readw(unsigned long iobase, in apci3501_eeprom_readw() argument
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| D | pcmmio.c | 189 unsigned long iobase = dev->iobase; in pcmmio_dio_write() local
195 outb(val & 0xff, iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_write()
196 outb((val >> 8) & 0xff, iobase + PCMMIO_PORT_REG(port + 1)); in pcmmio_dio_write()
197 outb((val >> 16) & 0xff, iobase + PCMMIO_PORT_REG(port + 2)); in pcmmio_dio_write()
199 outb(PCMMIO_PAGE(page), iobase + PCMMIO_PAGE_LOCK_REG); in pcmmio_dio_write()
200 outb(val & 0xff, iobase + PCMMIO_PAGE_REG(0)); in pcmmio_dio_write()
201 outb((val >> 8) & 0xff, iobase + PCMMIO_PAGE_REG(1)); in pcmmio_dio_write()
202 outb((val >> 16) & 0xff, iobase + PCMMIO_PAGE_REG(2)); in pcmmio_dio_write()
211 unsigned long iobase = dev->iobase; in pcmmio_dio_read() local
218 val = inb(iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_read()
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| D | dt2817.c | 65 outb(oe, dev->iobase + DT2817_CR); in dt2817_dio_insn_config()
75 unsigned long iobase = dev->iobase + DT2817_DATA; in dt2817_dio_insn_bits() local
82 outb(s->state & 0xff, iobase + 0); in dt2817_dio_insn_bits()
84 outb((s->state >> 8) & 0xff, iobase + 1); in dt2817_dio_insn_bits()
86 outb((s->state >> 16) & 0xff, iobase + 2); in dt2817_dio_insn_bits()
88 outb((s->state >> 24) & 0xff, iobase + 3); in dt2817_dio_insn_bits()
91 val = inb(iobase + 0); in dt2817_dio_insn_bits()
92 val |= (inb(iobase + 1) << 8); in dt2817_dio_insn_bits()
93 val |= (inb(iobase + 2) << 16); in dt2817_dio_insn_bits()
94 val |= (inb(iobase + 3) << 24); in dt2817_dio_insn_bits()
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| D | addi_watchdog.c | 18 unsigned long iobase; member
44 outl(reload, spriv->iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_insn_config()
57 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_config()
71 data[i] = inl(spriv->iobase + ADDI_TCW_STATUS_REG); in addi_watchdog_insn_read()
92 spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_write()
98 void addi_watchdog_reset(unsigned long iobase) in addi_watchdog_reset() argument
100 outl(0x0, iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_reset()
101 outl(0x0, iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_reset()
105 int addi_watchdog_init(struct comedi_subdevice *s, unsigned long iobase) in addi_watchdog_init() argument
113 spriv->iobase = iobase; in addi_watchdog_init()
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| D | quatech_daqp_cs.c | 169 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_clear_events()
189 outb(DAQP_CMD_STOP, dev->iobase + DAQP_CMD_REG); in daqp_ai_cancel()
190 outb(0, dev->iobase + DAQP_CTRL_REG); in daqp_ai_cancel()
191 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_cancel()
205 val = inb(dev->iobase + DAQP_AI_FIFO_REG); in daqp_ai_get_sample()
206 val |= inb(dev->iobase + DAQP_AI_FIFO_REG) << 8; in daqp_ai_get_sample()
221 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
246 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
277 outb(val & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
278 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
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| D | multiq3.c | 78 dev->iobase + MULTIQ3_CTRL_REG); in multiq3_set_ctrl()
88 status = inw(dev->iobase + MULTIQ3_STATUS_REG); in multiq3_ai_status()
112 outw(0, dev->iobase + MULTIQ3_AI_CONV_REG); in multiq3_ai_insn_read()
120 val = inb(dev->iobase + MULTIQ3_AI_REG) << 8; in multiq3_ai_insn_read()
121 val |= inb(dev->iobase + MULTIQ3_AI_REG); in multiq3_ai_insn_read()
144 outw(val, dev->iobase + MULTIQ3_AO_REG); in multiq3_ao_insn_write()
156 data[1] = inw(dev->iobase + MULTIQ3_DI_REG); in multiq3_di_insn_bits()
167 outw(s->state, dev->iobase + MULTIQ3_DO_REG); in multiq3_do_insn_bits()
189 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read()
192 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read()
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| /Linux-v4.19/drivers/rtc/ |
| D | rtc-asm9260.c | 112 void __iomem *iobase; member
124 isr = ioread32(priv->iobase + HW_CIIR); in asm9260_rtc_irq()
130 iowrite32(0, priv->iobase + HW_CIIR); in asm9260_rtc_irq()
145 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
146 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
147 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
149 if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) { in asm9260_rtc_read_time()
154 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
155 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
156 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
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| /Linux-v4.19/drivers/bluetooth/ |
| D | bt3c_cs.c | 116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) in bt3c_address() argument
118 outb(addr & 0xff, iobase + ADDR_L); in bt3c_address()
119 outb((addr >> 8) & 0xff, iobase + ADDR_H); in bt3c_address()
123 static inline void bt3c_put(unsigned int iobase, unsigned short value) in bt3c_put() argument
125 outb(value & 0xff, iobase + DATA_L); in bt3c_put()
126 outb((value >> 8) & 0xff, iobase + DATA_H); in bt3c_put()
130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) in bt3c_io_write() argument
132 bt3c_address(iobase, addr); in bt3c_io_write()
133 bt3c_put(iobase, value); in bt3c_io_write()
137 static inline unsigned short bt3c_get(unsigned int iobase) in bt3c_get() argument
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| D | bluecard_cs.c | 162 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_activity_led_timeout() local
171 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
177 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_enable_activity_led() local
187 outb(0x18 | 0x60, iobase + 0x30); in bluecard_enable_activity_led()
190 outb(0x00, iobase + 0x30); in bluecard_enable_activity_led()
202 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) in bluecard_write() argument
208 outb_p(actual, iobase + offset); in bluecard_write()
211 outb_p(buf[i], iobase + offset + i + 1); in bluecard_write()
233 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_write_wakeup() local
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
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| /Linux-v4.19/drivers/irqchip/ |
| D | irq-sa11x0.c | 31 static void __iomem *iobase; variable
41 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
43 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq()
50 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
52 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq()
96 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend()
97 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend()
98 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend()
103 writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); in sa1100irq_suspend()
113 writel_relaxed(st->iccr, iobase + ICCR); in sa1100irq_resume()
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| /Linux-v4.19/arch/arm/mach-imx/devices/ |
| D | devices-common.h | 46 resource_size_t iobase; member
55 resource_size_t iobase; member
65 resource_size_t iobase; member
78 resource_size_t iobase; member
86 resource_size_t iobase; member
95 resource_size_t iobase; member
102 resource_size_t iobase; member
111 resource_size_t iobase; member
123 resource_size_t iobase; member
133 resource_size_t iobase; member
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| /Linux-v4.19/drivers/net/hamradio/ |
| D | baycom_ser_fdx.c | 107 #define RBR(iobase) (iobase+0) argument
108 #define THR(iobase) (iobase+0) argument
109 #define IER(iobase) (iobase+1) argument
110 #define IIR(iobase) (iobase+2) argument
111 #define FCR(iobase) (iobase+2) argument
112 #define LCR(iobase) (iobase+3) argument
113 #define MCR(iobase) (iobase+4) argument
114 #define LSR(iobase) (iobase+5) argument
115 #define MSR(iobase) (iobase+6) argument
116 #define SCR(iobase) (iobase+7) argument
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| D | baycom_ser_hdx.c | 94 #define RBR(iobase) (iobase+0) argument
95 #define THR(iobase) (iobase+0) argument
96 #define IER(iobase) (iobase+1) argument
97 #define IIR(iobase) (iobase+2) argument
98 #define FCR(iobase) (iobase+2) argument
99 #define LCR(iobase) (iobase+3) argument
100 #define MCR(iobase) (iobase+4) argument
101 #define LSR(iobase) (iobase+5) argument
102 #define MSR(iobase) (iobase+6) argument
103 #define SCR(iobase) (iobase+7) argument
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| D | yam.c | 115 int iobase; member
164 #define RBR(iobase) (iobase+0) argument
165 #define THR(iobase) (iobase+0) argument
166 #define IER(iobase) (iobase+1) argument
167 #define IIR(iobase) (iobase+2) argument
168 #define FCR(iobase) (iobase+2) argument
169 #define LCR(iobase) (iobase+3) argument
170 #define MCR(iobase) (iobase+4) argument
171 #define LSR(iobase) (iobase+5) argument
172 #define MSR(iobase) (iobase+6) argument
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| /Linux-v4.19/drivers/net/ethernet/dec/tulip/ |
| D | de4x5.h | 16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
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| /Linux-v4.19/drivers/i2c/busses/ |
| D | i2c-xlr.c | 84 u32 __iomem *iobase; member
100 return !xlr_i2c_busy(priv, xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS)); in xlr_i2c_idle()
113 status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); in xlr_i2c_wait()
123 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, in xlr_i2c_tx_irq()
133 xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN); in xlr_i2c_rx_irq()
142 int_stat = xlr_i2c_rdreg(priv->iobase, XLR_I2C_INT_STAT); in xlr_i2c_irq()
146 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, int_stat); in xlr_i2c_irq()
151 status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); in xlr_i2c_irq()
177 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset); in xlr_i2c_tx()
178 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); in xlr_i2c_tx()
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| /Linux-v4.19/drivers/char/pcmcia/ |
| D | cm4000_cs.c | 304 static unsigned short io_read_num_rec_bytes(unsigned int iobase, in io_read_num_rec_bytes() argument
312 tmp = inb(REG_NUM_BYTES(iobase)) | in io_read_num_rec_bytes()
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0); in io_read_num_rec_bytes()
423 unsigned int iobase = dev->p_dev->resource[0]->start; in set_cardparameter() local
429 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_cardparameter()
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase)); in set_cardparameter()
444 xoutb(stopbits, REG_STOPBITS(iobase)); in set_cardparameter()
456 unsigned int iobase = dev->p_dev->resource[0]->start; in set_protocol() local
492 xoutb(0x80, REG_FLAGS0(iobase)); in set_protocol()
499 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_protocol()
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| /Linux-v4.19/drivers/net/wan/ |
| D | sealevel.c | 49 int iobase; member
181 static int slvl_setup(struct slvl_device *sv, int iobase, int irq) in slvl_setup() argument
190 dev->base_addr = iobase; in slvl_setup()
208 static __init struct slvl_board *slvl_init(int iobase, int irq, in slvl_init() argument
218 if (!request_region(iobase, 8, "Sealevel 4021")) { in slvl_init()
219 pr_warn("I/O 0x%X already in use\n", iobase); in slvl_init()
241 b->iobase = iobase; in slvl_init()
248 iobase |= Z8530_PORT_SLEEP; in slvl_init()
250 dev->chanA.ctrlio = iobase + 1; in slvl_init()
251 dev->chanA.dataio = iobase; in slvl_init()
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