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/Linux-v4.19/drivers/iio/imu/inv_mpu6050/
DMakefile6 obj-$(CONFIG_INV_MPU6050_IIO) += inv-mpu6050.o
7 inv-mpu6050-objs := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o
9 obj-$(CONFIG_INV_MPU6050_I2C) += inv-mpu6050-i2c.o
10 inv-mpu6050-i2c-objs := inv_mpu_i2c.o inv_mpu_acpi.o
12 obj-$(CONFIG_INV_MPU6050_SPI) += inv-mpu6050-spi.o
13 inv-mpu6050-spi-objs := inv_mpu_spi.o
DKconfig2 # inv-mpu6050 drivers for Invensense MPU devices and combos
19 inv-mpu6050-i2c.
30 inv-mpu6050-spi.
/Linux-v4.19/net/netfilter/
Dnft_compat.c160 union nft_entry *entry, u16 proto, bool inv) in nft_target_set_tgchk_param() argument
167 entry->e4.ip.invflags = inv ? IPT_INV_PROTO : 0; in nft_target_set_tgchk_param()
174 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0; in nft_target_set_tgchk_param()
178 entry->ebt.invflags = inv ? EBT_IPROTO : 0; in nft_target_set_tgchk_param()
214 static int nft_parse_compat(const struct nlattr *attr, u16 *proto, bool *inv) in nft_parse_compat() argument
232 *inv = true; in nft_parse_compat()
248 bool inv = false; in nft_target_init() local
255 ret = nft_parse_compat(ctx->nla[NFTA_RULE_COMPAT], &proto, &inv); in nft_target_init()
260 nft_target_set_tgchk_param(&par, ctx, target, info, &e, proto, inv); in nft_target_init()
262 ret = xt_check_target(&par, size, proto, inv); in nft_target_init()
[all …]
Dxt_set.c35 struct ip_set_adt_opt *opt, int inv) in match_set() argument
38 inv = !inv; in match_set()
39 return inv; in match_set()
/Linux-v4.19/Documentation/sphinx/
Dcdomain.py133 inv = self.env.domaindata['c']['objects']
134 if (name in inv and self.env.config.nitpicky):
139 'other instance in ' + self.env.doc2path(inv[name][0]),
141 inv[name] = (self.env.docname, self.objtype)
/Linux-v4.19/lib/842/
D842_compress.c235 bool inv = false; in add_template() local
252 inv = true; in add_template()
258 inv = true; in add_template()
264 inv = true; in add_template()
270 inv = true; in add_template()
274 inv = true; in add_template()
280 inv = true; in add_template()
283 inv = (b != 8) || !(t[i] & OP_ACTION_NOOP); in add_template()
286 inv = true; in add_template()
293 if (inv) { in add_template()
/Linux-v4.19/Documentation/devicetree/bindings/phy/
Dphy-miphy365x.txt36 - st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp)
37 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
59 st,pcie-tx-pol-inv;
/Linux-v4.19/drivers/mtd/nand/raw/
Dnand_hynix.c268 #define NAND_HYNIX_1XNM_RR_SET_OFFS(x, setsize, inv) \ argument
269 (16 + ((((x) * 2) + ((inv) ? 1 : 0)) * (setsize)))
272 int mode, int reg, bool inv, u8 *val) in hynix_mlc_1xnm_rr_value() argument
280 int set_offs = NAND_HYNIX_1XNM_RR_SET_OFFS(i, set_size, inv); in hynix_mlc_1xnm_rr_value()
289 if (inv) in hynix_mlc_1xnm_rr_value()
/Linux-v4.19/drivers/irqchip/
Dirq-gic-v4.c213 int its_prop_update_vlpi(int irq, u8 config, bool inv) in its_prop_update_vlpi() argument
216 .cmd_type = inv ? PROP_UPDATE_AND_INV_VLPI : PROP_UPDATE_VLPI, in its_prop_update_vlpi()
/Linux-v4.19/drivers/auxdisplay/
Dpanel.c632 int d_bit, c_bit, inv; in pin_to_bits() local
644 inv = (pin < 0); in pin_to_bits()
645 if (inv) in pin_to_bits()
654 inv = !inv; in pin_to_bits()
661 inv = !inv; in pin_to_bits()
668 inv = !inv; in pin_to_bits()
676 c_val[!inv] = c_bit; in pin_to_bits()
679 d_val[!inv] = d_bit; in pin_to_bits()
/Linux-v4.19/arch/arm/mm/
Dproc-feroceon.S265 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
266 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
311 mcr p15, 5, r0, c15, c14, 0 @ D inv range start
312 mcr p15, 5, r1, c15, c14, 1 @ D inv range top
374 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
375 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
/Linux-v4.19/drivers/infiniband/hw/qib/
Dqib_uc.c273 inv: in qib_uc_rcv()
305 goto inv; in qib_uc_rcv()
313 goto inv; in qib_uc_rcv()
323 goto inv; in qib_uc_rcv()
/Linux-v4.19/include/linux/irqchip/
Darm-gic-v4.h110 int its_prop_update_vlpi(int irq, u8 config, bool inv);
/Linux-v4.19/drivers/infiniband/hw/hfi1/
Duc.c334 inv: in hfi1_uc_rcv()
367 goto inv; in hfi1_uc_rcv()
375 goto inv; in hfi1_uc_rcv()
385 goto inv; in hfi1_uc_rcv()
/Linux-v4.19/Documentation/devicetree/bindings/sound/
Dcs42l42.txt22 - cirrus,ts-inv : Boolean property. For jacks that invert the tip sense
100 cirrus,ts-inv = <0x00>;
/Linux-v4.19/sound/soc/codecs/
Dcs42l73.c948 unsigned int inv, format; in cs42l73_set_dai_fmt() local
968 inv = (fmt & SND_SOC_DAIFMT_INV_MASK); in cs42l73_set_dai_fmt()
997 if (inv == SND_SOC_DAIFMT_IB_IF) in cs42l73_set_dai_fmt()
999 if (inv == SND_SOC_DAIFMT_IB_NF) in cs42l73_set_dai_fmt()
1003 if (inv == SND_SOC_DAIFMT_IB_IF) in cs42l73_set_dai_fmt()
/Linux-v4.19/drivers/media/dvb-frontends/
Dtda10023.c462 int sync,inv; in tda10023_get_frontend() local
467 inv = tda10023_readreg(state, 0x04); in tda10023_get_frontend()
477 p->inversion = (inv&0x20?0:1); in tda10023_get_frontend()
Dlgs8gl5.c344 u8 inv = lgs8gl5_read_reg(state, REG_INVERSION); in lgs8gl5_get_frontend() local
346 p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF; in lgs8gl5_get_frontend()
/Linux-v4.19/drivers/power/supply/
Dgeneric-adc-battery.c96 bool inv = pdata->gpio_inverted; in gab_charge_finished() local
100 return ret ^ inv; in gab_charge_finished()
/Linux-v4.19/arch/mips/boot/dts/brcm/
Dbcm63268-comtrend-vr-3032u.dts25 brcm,serial-shift-inv;
/Linux-v4.19/Documentation/sound/hd-audio/
Dmodels.rst35 inv-dmic
56 inv-dmic
73 inv-dmic
290 inv-dmic
383 inv-dmic
730 hp-inv-led
/Linux-v4.19/drivers/video/fbdev/
Dpxa168fb.h271 #define CFG_VSYNC_INV(inv) ((inv) << 27) argument
/Linux-v4.19/arch/x86/events/intel/
Dp6.c188 PMU_FORMAT_ATTR(inv, "config:23" );
Dcore.c2903 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16); in intel_pebs_aliases_core2()
2931 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_snb()
2955 u64 alt_config = X86_CONFIG(.event=0xc0, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_precdist()
3231 PMU_FORMAT_ATTR(inv, "config:23" );
3993 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
3996 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
4119 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
4122 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
4158 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
4161 X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
[all …]
Duncore_snb.c80 DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");

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