Home
last modified time | relevance | path

Searched refs:instruction (Results 1 – 25 of 295) sorted by relevance

12345678910>>...12

/Linux-v4.19/arch/sh/kernel/
Dtraps_32.c88 static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs, in handle_unaligned_ins() argument
96 index = (instruction>>8)&15; /* 0x0F00 */ in handle_unaligned_ins()
99 index = (instruction>>4)&15; /* 0x00F0 */ in handle_unaligned_ins()
102 count = 1<<(instruction&3); in handle_unaligned_ins()
112 switch (instruction>>12) { in handle_unaligned_ins()
114 if (instruction & 8) { in handle_unaligned_ins()
146 dstu += (instruction&0x000F)<<2; in handle_unaligned_ins()
154 if (instruction & 4) in handle_unaligned_ins()
168 srcu += (instruction & 0x000F) << 2; in handle_unaligned_ins()
179 if (instruction & 4) in handle_unaligned_ins()
[all …]
/Linux-v4.19/drivers/media/usb/gspca/
Djl2005bcd.c116 static u8 instruction[2] = {0x95, 0x00}; in jl2005c_read_reg() local
118 instruction[1] = reg; in jl2005c_read_reg()
120 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_read_reg()
134 static u8 instruction[2] = {0x7f, 0x01}; in jl2005c_start_new_frame() local
136 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_start_new_frame()
161 u8 instruction[2]; in jl2005c_write_reg() local
163 instruction[0] = reg; in jl2005c_write_reg()
164 instruction[1] = value; in jl2005c_write_reg()
166 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_write_reg()
209 static u8 instruction[][2] = { in jl2005c_stream_start_vga_lg() local
[all …]
/Linux-v4.19/net/nfc/hci/
Dhcp.c34 u8 type, u8 instruction, in nfc_hci_hcp_message_tx() argument
87 packet->message.header = HCP_HEADER(type, instruction); in nfc_hci_hcp_message_tx()
132 u8 instruction, struct sk_buff *skb) in nfc_hci_hcp_message_rx() argument
136 nfc_hci_resp_received(hdev, instruction, skb); in nfc_hci_hcp_message_rx()
139 nfc_hci_cmd_received(hdev, pipe, instruction, skb); in nfc_hci_hcp_message_rx()
142 nfc_hci_event_received(hdev, pipe, instruction, skb); in nfc_hci_hcp_message_rx()
146 type, instruction); in nfc_hci_hcp_message_rx()
/Linux-v4.19/drivers/video/backlight/
Dotm3225a.c160 struct otm3225a_spi_instruction *instruction, in otm3225a_write() argument
169 buf[2] = instruction->reg; in otm3225a_write()
174 buf[1] = (instruction->value >> 8) & 0xff; in otm3225a_write()
175 buf[2] = instruction->value & 0xff; in otm3225a_write()
179 if (instruction->delay) in otm3225a_write()
180 msleep(instruction->delay); in otm3225a_write()
181 instruction++; in otm3225a_write()
/Linux-v4.19/tools/objtool/
Dcheck.c33 struct instruction *insn;
39 struct instruction *find_insn(struct objtool_file *file, in find_insn()
42 struct instruction *insn; in find_insn()
51 static struct instruction *next_insn_same_sec(struct objtool_file *file, in next_insn_same_sec()
52 struct instruction *insn) in next_insn_same_sec()
54 struct instruction *next = list_next_entry(insn, list); in next_insn_same_sec()
62 static struct instruction *next_insn_same_func(struct objtool_file *file, in next_insn_same_func()
63 struct instruction *insn) in next_insn_same_func()
65 struct instruction *next = list_next_entry(insn, list); in next_insn_same_func()
148 struct instruction *insn; in __dead_end_function()
[all …]
Dcheck.h39 struct instruction { struct
50 struct instruction *jump_dest; argument
51 struct instruction *first_jump_src; argument
69 struct instruction *find_insn(struct objtool_file *file, argument
/Linux-v4.19/arch/nios2/platform/
DKconfig.platform64 bool "Enable MUL instruction"
68 instruction. This will enable the -mhw-mul compiler flag.
71 bool "Enable MULX instruction"
75 instruction. Enables the -mhw-mulx compiler flag.
78 bool "Enable DIV instruction"
82 instruction. Enables the -mhw-div compiler flag.
109 bool "Byteswap custom instruction"
112 Use the byteswap (endian converter) Nios II custom instruction provided
117 int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
120 Number of the instruction as configured in QSYS Builder.
[all …]
/Linux-v4.19/Documentation/
Dlzo.txt22 the operands for the instruction, whose size and position depend on the
23 opcode and on the number of literals copied by previous instruction. The
59 After any instruction except the large literal copy, 0, 1, 2 or 3 literals
60 are copied before starting the next instruction. The number of literals that
61 were copied may change the meaning and behaviour of the next instruction. In
62 practice, only one instruction needs to know whether 0, less than 4, or more
65 generally encoded in the last two bits of the instruction but may also be
69 instruction may encode this distance (0001HLLL), it takes one LE16 operand
86 0..17 : follow regular instruction encoding, see below. It is worth
103 Depends on the number of literals copied by the last instruction.
[all …]
Dkprobes.txt37 any instruction in the kernel. A return probe fires when a specified
64 instruction and replaces the first byte(s) of the probed instruction
65 with a breakpoint instruction (e.g., int3 on i386 and x86_64).
67 When a CPU hits the breakpoint instruction, a trap occurs, the CPU's
73 Next, Kprobes single-steps its copy of the probed instruction.
74 (It would be simpler to single-step the actual instruction in place,
76 instruction. This would open a small time window when another CPU
79 After the instruction is single-stepped, Kprobes executes the
81 Execution then continues with the instruction following the probepoint.
87 register set, including instruction pointer. This operation requires
[all …]
/Linux-v4.19/Documentation/arm64/
Dlegacy_instructions.txt3 the architecture. The infrastructure code uses undefined instruction
5 the instruction execution in hardware.
13 Generates undefined instruction abort. Default for instructions that
19 usage of emulated instruction is traced as well as rate limited
31 The default mode depends on the status of the instruction in the
36 individual instruction notes for further information.
/Linux-v4.19/drivers/mtd/spi-nor/
Datmel-quadspi.c169 u32 instruction:1; member
178 u8 instruction; member
226 if (cmd->enable.bits.instruction) in atmel_qspi_debug_command()
227 cmd_buf[len++] = cmd->instruction; in atmel_qspi_debug_command()
321 if (cmd->enable.bits.instruction) { in atmel_qspi_run_command()
322 icr |= QSPI_ICR_INST(cmd->instruction); in atmel_qspi_run_command()
464 cmd.enable.bits.instruction = 1; in atmel_qspi_read_reg()
466 cmd.instruction = opcode; in atmel_qspi_read_reg()
480 cmd.enable.bits.instruction = 1; in atmel_qspi_write_reg()
482 cmd.instruction = opcode; in atmel_qspi_write_reg()
[all …]
/Linux-v4.19/arch/arm/probes/kprobes/
Dtest-core.h157 #define TEST_INSTRUCTION(instruction) \ argument
159 "1: "instruction" \n\t" \
162 #define TEST_BRANCH_F(instruction) \ argument
163 TEST_INSTRUCTION(instruction) \
167 #define TEST_BRANCH_B(instruction) \ argument
172 TEST_INSTRUCTION(instruction)
174 #define TEST_BRANCH_FX(instruction, codex) \ argument
175 TEST_INSTRUCTION(instruction) \
181 #define TEST_BRANCH_BX(instruction, codex) \ argument
187 TEST_INSTRUCTION(instruction)
/Linux-v4.19/tools/perf/util/intel-pt-decoder/
DBuild16 …(echo "Warning: Intel PT: x86 instruction decoder C file at 'tools/perf/util/intel-pt-decoder/insn…
18 …(echo "Warning: Intel PT: x86 instruction decoder C file at 'tools/perf/util/intel-pt-decoder/inat…
20 …(echo "Warning: Intel PT: x86 instruction decoder map file at 'tools/perf/util/intel-pt-decoder/x8…
22 …(echo "Warning: Intel PT: x86 instruction decoder script at 'tools/perf/util/intel-pt-decoder/gen-…
24 …(echo "Warning: Intel PT: x86 instruction decoder header at 'tools/perf/util/intel-pt-decoder/insn…
26 …(echo "Warning: Intel PT: x86 instruction decoder header at 'tools/perf/util/intel-pt-decoder/inat…
28 …(echo "Warning: Intel PT: x86 instruction decoder header at 'tools/perf/util/intel-pt-decoder/inat…
/Linux-v4.19/arch/arm/nwfpe/
Dentry.S90 bne next @ get the next instruction;
93 bl EmulateAll @ emulate the instruction
99 .Lx1: ldrt r6, [r5], #4 @ get the next instruction and
116 @ plain LDR instruction. Weird, but it seems harmless.
/Linux-v4.19/arch/s390/kvm/
Dtrace.h157 __field(__u64, instruction)
162 __entry->instruction = ((__u64)ipa << 48) |
167 __entry->instruction,
168 __print_symbolic(icpt_insn_decoder(__entry->instruction),
424 __field(__u64, instruction)
429 __entry->instruction = ((__u64)ipa << 48) |
434 __entry->instruction,
435 __print_symbolic(icpt_insn_decoder(__entry->instruction),
/Linux-v4.19/arch/openrisc/
DKconfig105 bool "Have instruction l.ff1"
108 Select this if your implementation has the Class II instruction l.ff1
111 bool "Have instruction l.fl1"
114 Select this if your implementation has the Class II instruction l.fl1
117 bool "Have instruction l.mul for hardware multiply"
120 Select this if your implementation has a hardware multiply instruction
123 bool "Have instruction l.div for hardware divide"
126 Select this if your implementation has a hardware divide instruction
/Linux-v4.19/arch/arm/kernel/
Dentry-armv.S243 @ Correct the PC such that it is pointing at the instruction
244 @ which caused the fault. If the faulting instruction was ARM
245 @ the PC will be pointing at the next instruction, and have to
247 @ pointing at the second half of the Thumb instruction. We
258 @ If a kprobe is about to simulate a "stmdb sp..." instruction,
267 @ the instruction, or the more conventional lr if we are to treat
268 @ this as a real undefined instruction
270 @ r0 - instruction
276 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
277 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
[all …]
/Linux-v4.19/arch/m68k/fpsp040/
Dbugfix.S247 | dest and the dest of the xu. We must clear the instruction in
248 | the cu and restore the state, allowing the instruction in the
249 | xu to complete. Remember, the instruction in the nu
251 | If the result of the xu instruction is not exceptional, we can
252 | restore the instruction from the cu to the frame and continue
275 | Check if the instruction which just completed was exceptional.
280 | It is necessary to isolate the result of the instruction in the
369 | dest and the dest of the xu. We must clear the instruction in
370 | the cu and restore the state, allowing the instruction in the
371 | xu to complete. Remember, the instruction in the nu
[all …]
Dsmovecr.S5 | offset given in the instruction field.
7 | Input: An offset in the instruction word.
/Linux-v4.19/tools/objtool/Documentation/
Dstack-validation.txt15 validates the correct frame pointer state at each instruction.
19 alternative execution paths to a given instruction (or set of
123 ENTRY/ENDPROC macros. If objtool finds a return instruction
195 uses an inline asm() statement which has a "call" instruction. An
196 asm() statement with a call instruction must declare the use of the
205 2. file.o: warning: objtool: .text+0x53: unreachable instruction
207 Objtool couldn't find a code path to reach the instruction.
209 If the error is for an asm file, and the instruction is inside (or
224 4. file.o: warning: objtool: func(): can't find starting instruction
226 file.o: warning: objtool: func()+0x11dd: can't decode instruction
[all …]
/Linux-v4.19/arch/powerpc/kernel/
Dmodule_64.c470 static bool is_mprofile_mcount_callsite(const char *name, u32 *instruction) in is_mprofile_mcount_callsite() argument
478 if (instruction[-1] == PPC_INST_STD_LR && in is_mprofile_mcount_callsite()
479 instruction[-2] == PPC_INST_MFLR) in is_mprofile_mcount_callsite()
482 if (instruction[-1] == PPC_INST_MFLR) in is_mprofile_mcount_callsite()
506 static bool is_mprofile_mcount_callsite(const char *name, u32 *instruction) in is_mprofile_mcount_callsite() argument
514 static int restore_r2(const char *name, u32 *instruction, struct module *me) in restore_r2() argument
516 u32 *prev_insn = instruction - 1; in restore_r2()
529 if (*instruction != PPC_INST_NOP) { in restore_r2()
531 me->name, *instruction, instruction); in restore_r2()
535 *instruction = PPC_INST_LD_TOC; in restore_r2()
/Linux-v4.19/arch/m68k/ifpsp060/src/
Disp.S1218 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1219 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1230 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1231 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1242 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1243 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1254 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1255 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1266 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1267 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
[all …]
Dpfpsp.S1228 # the FPIAR holds the "current PC" of the faulting instruction
1232 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1233 addq.l &0x4,EXC_EXTWPTR(%a6) # incr instruction ptr
1234 bsr.l _imem_read_long # fetch the instruction words
1722 # three instruction exceptions don't update the stack pointer. so, if the
2038 # The opclass two PACKED instruction that took an "Unimplemented Data Type"
2371 # _imem_read_long() - read instruction longword #
2384 # fmovm_dynamic() - emulate dynamic fmovm instruction #
2385 # fmovm_ctrl() - emulate fmovm control instruction #
2404 # (2) The "fmovm.x" instruction w/ dynamic register specification. #
[all …]
/Linux-v4.19/Documentation/arm/nwfpe/
DNOTES8 often uses an stfe instruction to save f4 on the stack upon entry to a
9 function, and an ldfe instruction to restore it before returning.
15 This is a side effect of the stfe instruction. The double in f4 had to be
29 in extended precision, due to the stfe instruction used to save f4 in log(y).
/Linux-v4.19/arch/xtensa/
DKconfig.debug25 bool "Perform S32C1I instruction self-test at boot"
28 Enable this option to test S32C1I instruction behavior at boot.
29 Correct operation of this instruction requires some cooperation from hardware

12345678910>>...12