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Searched refs:imx_clk_busy_divider (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/clk/imx/
Dclk-imx6sll.c236 …clks[IMX6SLL_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0… in imx6sll_clocks_init()
237 …clks[IMX6SLL_CLK_MMDC_PODF] = imx_clk_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, b… in imx6sll_clocks_init()
238 …clks[IMX6SLL_CLK_AXI_PODF] = imx_clk_busy_divider("axi", "axi_sel", base + 0x14, 16, 3, ba… in imx6sll_clocks_init()
239 …clks[IMX6SLL_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x… in imx6sll_clocks_init()
Dclk-imx6sl.c328 …clks[IMX6SL_CLK_OCRAM_PODF] = imx_clk_busy_divider("ocram_podf", "ocram_sel", bas… in imx6sl_clocks_init()
363 …clks[IMX6SL_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, b… in imx6sl_clocks_init()
364 …clks[IMX6SL_CLK_MMDC_ROOT] = imx_clk_busy_divider("mmdc", "periph2", base + 0x14, 3, 3, b… in imx6sl_clocks_init()
365 …clks[IMX6SL_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, b… in imx6sl_clocks_init()
Dclk-imx6q.c717 …clk[IMX6QDL_CLK_AXI] = imx_clk_busy_divider("axi", "axi_sel", base… in imx6q_clocks_init()
718 …clk[IMX6QDL_CLK_MMDC_CH0_AXI_PODF] = imx_clk_busy_divider("mmdc_ch0_axi_podf", "periph", base… in imx6q_clocks_init()
721 …clk[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_busy_divider("mmdc_ch1_axi_podf", "mmdc_ch1_axi_cg", … in imx6q_clocks_init()
723 …clk[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_busy_divider("mmdc_ch1_axi_podf", "periph2", base… in imx6q_clocks_init()
725 …clk[IMX6QDL_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base… in imx6q_clocks_init()
726 …clk[IMX6QDL_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base… in imx6q_clocks_init()
Dclk-imx6ul.c327 …clks[IMX6UL_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x4… in imx6ul_clocks_init()
328 …clks[IMX6UL_CLK_MMDC_PODF] = imx_clk_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, ba… in imx6ul_clocks_init()
329 …clks[IMX6UL_CLK_AXI_PODF] = imx_clk_busy_divider("axi_podf", "axi_sel", base + 0x14, 16, 3, bas… in imx6ul_clocks_init()
330 …clks[IMX6UL_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x4… in imx6ul_clocks_init()
Dclk-imx6sx.c367 …clks[IMX6SX_CLK_OCRAM_PODF] = imx_clk_busy_divider("ocram_podf", "ocram_sel", base + 0x14, … in imx6sx_clocks_init()
368 …clks[IMX6SX_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base + 0x14, … in imx6sx_clocks_init()
369 …clks[IMX6SX_CLK_MMDC_PODF] = imx_clk_busy_divider("mmdc_podf", "periph2", base + 0x14, … in imx6sx_clocks_init()
370 …clks[IMX6SX_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base + 0x10, … in imx6sx_clocks_init()
Dclk-busy.c81 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, in imx_clk_busy_divider() function
Dclk.h60 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,