/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
D | vega10_ih.c | 47 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_enable_interrupts() local 49 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in vega10_ih_enable_interrupts() 50 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in vega10_ih_enable_interrupts() 51 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_enable_interrupts() 64 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_disable_interrupts() local 66 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in vega10_ih_disable_interrupts() 67 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in vega10_ih_disable_interrupts() 68 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_disable_interrupts() 91 u32 ih_rb_cntl, ih_doorbell_rtpr; in vega10_ih_irq_init() local 100 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_irq_init() [all …]
|
D | tonga_ih.c | 60 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_enable_interrupts() local 62 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in tonga_ih_enable_interrupts() 63 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in tonga_ih_enable_interrupts() 64 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_enable_interrupts() 77 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_disable_interrupts() local 79 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in tonga_ih_disable_interrupts() 80 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in tonga_ih_disable_interrupts() 81 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_disable_interrupts() 103 u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr; in tonga_ih_irq_init() local 127 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_irq_init() [all …]
|
D | cz_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_enable_interrupts() local 64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts() 66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_enable_interrupts() 79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_disable_interrupts() local 82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts() 84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_disable_interrupts() 107 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cz_ih_irq_init() local 128 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init() 129 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_irq_init() 130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init() [all …]
|
D | iceland_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_enable_interrupts() local 64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts() 66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_enable_interrupts() 79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_disable_interrupts() local 82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts() 84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_disable_interrupts() 107 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in iceland_ih_irq_init() local 128 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init() 129 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_irq_init() 130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init() [all …]
|
D | cik_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_enable_interrupts() local 64 ih_rb_cntl |= IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_enable_interrupts() 66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_enable_interrupts() 79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_disable_interrupts() local 82 ih_rb_cntl &= ~IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_disable_interrupts() 84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_disable_interrupts() 107 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_ih_irq_init() local 127 ih_rb_cntl = (IH_RB_CNTL__WPTR_OVERFLOW_ENABLE_MASK | in cik_ih_irq_init() 131 ih_rb_cntl |= IH_RB_CNTL__WPTR_WRITEBACK_ENABLE_MASK; in cik_ih_irq_init() 138 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_irq_init()
|
D | si_ih.c | 34 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_enable_interrupts() local 37 ih_rb_cntl |= IH_RB_ENABLE; in si_ih_enable_interrupts() 39 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_enable_interrupts() 45 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_ih_disable_interrupts() local 48 ih_rb_cntl &= ~IH_RB_ENABLE; in si_ih_disable_interrupts() 50 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_disable_interrupts() 61 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in si_ih_irq_init() local 74 ih_rb_cntl = IH_WPTR_OVERFLOW_ENABLE | in si_ih_irq_init() 82 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_ih_irq_init()
|
/Linux-v4.19/drivers/gpu/drm/radeon/ |
D | r600.c | 3590 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_enable_interrupts() local 3593 ih_rb_cntl |= IH_RB_ENABLE; in r600_enable_interrupts() 3595 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_enable_interrupts() 3601 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_disable_interrupts() local 3604 ih_rb_cntl &= ~IH_RB_ENABLE; in r600_disable_interrupts() 3606 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_disable_interrupts() 3672 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in r600_irq_init() local 3707 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in r600_irq_init() 3712 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in r600_irq_init() 3718 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_irq_init()
|
D | si.c | 5919 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_enable_interrupts() local 5922 ih_rb_cntl |= IH_RB_ENABLE; in si_enable_interrupts() 5924 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_enable_interrupts() 5930 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_disable_interrupts() local 5933 ih_rb_cntl &= ~IH_RB_ENABLE; in si_disable_interrupts() 5935 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_disable_interrupts() 5978 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in si_irq_init() local 6010 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in si_irq_init() 6015 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in si_irq_init() 6021 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_irq_init()
|
D | cik.c | 6826 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_enable_interrupts() local 6829 ih_rb_cntl |= IH_RB_ENABLE; in cik_enable_interrupts() 6831 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_enable_interrupts() 6844 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_disable_interrupts() local 6847 ih_rb_cntl &= ~IH_RB_ENABLE; in cik_disable_interrupts() 6849 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_disable_interrupts() 6950 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_irq_init() local 6982 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in cik_irq_init() 6987 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in cik_irq_init() 6993 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_irq_init()
|