Searched refs:height_in_mb (Results 1 – 2 of 2) sorted by relevance
525 unsigned height_in_mb = ALIGN(height / 16, 2); in amdgpu_uvd_cs_msg_decode() local526 unsigned fs_in_mb = width_in_mb * height_in_mb; in amdgpu_uvd_cs_msg_decode()571 min_dpb_size += width_in_mb * height_in_mb * num_dpb_buffer * 192; in amdgpu_uvd_cs_msg_decode()574 min_dpb_size += width_in_mb * height_in_mb * 32; in amdgpu_uvd_cs_msg_decode()583 min_dpb_size += width_in_mb * height_in_mb * 128; in amdgpu_uvd_cs_msg_decode()592 tmp = max(width_in_mb, height_in_mb); in amdgpu_uvd_cs_msg_decode()608 min_dpb_size += width_in_mb * height_in_mb * 64; in amdgpu_uvd_cs_msg_decode()611 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in amdgpu_uvd_cs_msg_decode()651 width_in_mb * height_in_mb * num_dpb_buffer * 192; in amdgpu_uvd_cs_msg_decode()654 min_dpb_size += width_in_mb * height_in_mb * 32; in amdgpu_uvd_cs_msg_decode()[all …]
363 unsigned height_in_mb = ALIGN(height / 16, 2); in radeon_uvd_cs_msg_decode() local378 min_dpb_size += width_in_mb * height_in_mb * 17 * 192; in radeon_uvd_cs_msg_decode()381 min_dpb_size += width_in_mb * height_in_mb * 32; in radeon_uvd_cs_msg_decode()390 min_dpb_size += width_in_mb * height_in_mb * 128; in radeon_uvd_cs_msg_decode()399 tmp = max(width_in_mb, height_in_mb); in radeon_uvd_cs_msg_decode()415 min_dpb_size += width_in_mb * height_in_mb * 64; in radeon_uvd_cs_msg_decode()418 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in radeon_uvd_cs_msg_decode()
