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Searched refs:hdmi_read_reg (Results 1 – 16 of 16) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/omapdrm/dss/
Dhdmi4_cec.c70 u32 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
83 msg.msg[0] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
85 msg.msg[1] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
91 hdmi_read_reg(core->base, reg); in hdmi_cec_received_msg()
99 while (hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL) & 1) in hdmi_cec_received_msg()
105 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
111 u32 stat0 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0); in hdmi4_cec_irq()
112 u32 stat1 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1); in hdmi4_cec_irq()
122 u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3); in hdmi4_cec_irq()
142 temp = hdmi_read_reg(core->base, HDMI_CEC_DBG_3); in hdmi_cec_clear_tx_fifo()
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Dhdmi_wp.c25 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
49 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
56 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
125 v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_video_stop()
156 r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); in hdmi_wp_video_config_interface()
235 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG); in hdmi_wp_audio_config_format()
256 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG2); in hdmi_wp_audio_config_dma()
261 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CTRL); in hdmi_wp_audio_config_dma()
Dhdmi4_core.c237 r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1); in hdmi_core_video_config()
248 r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE); in hdmi_core_video_config()
261 r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL); in hdmi_core_video_config()
365 hdmi_read_reg(core->base, r)) in hdmi4_core_dump()
367 hdmi_read_reg(hdmi_av_base(core), r)) in hdmi4_core_dump()
370 hdmi_read_reg(hdmi_av_base(core), CORE_REG(i, r))) in hdmi4_core_dump()
559 r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL); in hdmi_core_audio_config()
597 r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL); in hdmi_core_audio_config()
610 r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE); in hdmi_core_audio_config()
Dhdmi_phy.c25 hdmi_read_reg(phy->base, r)) in hdmi_phy_dump()
135 hdmi_read_reg(phy->base, HDMI_TXPHY_TX_CTRL); in hdmi_phy_configure()
Dhdmi.h282 static inline u32 hdmi_read_reg(void __iomem *base_addr, const u32 idx) in hdmi_read_reg() function
288 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
291 FLD_GET(hdmi_read_reg(base, idx), start, end)
Dhdmi_pll.c29 hdmi_read_reg(pll->base, r)) in hdmi_pll_dump()
Dhdmi5_core.c233 hdmi_read_reg(core->base, r)) in hdmi5_core_dump()
339 r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF); in hdmi_core_video_config()
Dhdmi5.c99 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
Dhdmi4.c101 u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4); in hdmi_irq_handler()
/Linux-v4.19/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_wp.c26 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
50 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
57 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
126 v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_video_stop()
157 r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); in hdmi_wp_video_config_interface()
213 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG); in hdmi_wp_audio_config_format()
236 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG2); in hdmi_wp_audio_config_dma()
241 r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CTRL); in hdmi_wp_audio_config_dma()
Dhdmi4_core.c238 r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1); in hdmi_core_video_config()
249 r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE); in hdmi_core_video_config()
262 r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL); in hdmi_core_video_config()
369 hdmi_read_reg(core->base, r)) in hdmi4_core_dump()
371 hdmi_read_reg(hdmi_av_base(core), r)) in hdmi4_core_dump()
374 hdmi_read_reg(hdmi_av_base(core), CORE_REG(i, r))) in hdmi4_core_dump()
563 r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL); in hdmi_core_audio_config()
601 r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL); in hdmi_core_audio_config()
614 r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE); in hdmi_core_audio_config()
Dhdmi_phy.c34 hdmi_read_reg(phy->base, r)) in hdmi_phy_dump()
144 hdmi_read_reg(phy->base, HDMI_TXPHY_TX_CTRL); in hdmi_phy_configure()
Dhdmi.h264 static inline u32 hdmi_read_reg(void __iomem *base_addr, const u32 idx) in hdmi_read_reg() function
270 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
273 FLD_GET(hdmi_read_reg(base, idx), start, end)
Dhdmi_pll.c29 hdmi_read_reg(pll->base, r)) in hdmi_pll_dump()
Dhdmi5_core.c234 hdmi_read_reg(core->base, r)) in hdmi5_core_dump()
330 r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF); in hdmi_core_video_config()
Dhdmi5.c99 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()