Home
last modified time | relevance | path

Searched refs:hart (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/arch/riscv/kernel/
Dcpu.c22 u32 hart; in riscv_of_processor_hart() local
29 if (of_property_read_u32(node, "reg", &hart)) { in riscv_of_processor_hart()
33 if (hart >= NR_CPUS) { in riscv_of_processor_hart()
34 pr_info("Found hart ID %d, which is above NR_CPUs. Disabling this hart\n", hart); in riscv_of_processor_hart()
39 pr_warn("CPU with hartid=%d has no \"status\" property\n", hart); in riscv_of_processor_hart()
43 pr_info("CPU with hartid=%d has a non-okay status of \"%s\"\n", hart, status); in riscv_of_processor_hart()
48 pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart); in riscv_of_processor_hart()
52 pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa); in riscv_of_processor_hart()
56 return hart; in riscv_of_processor_hart()
Dsmpboot.c53 int hart, im_okay_therefore_i_am = 0; in setup_smp() local
56 hart = riscv_of_processor_hart(dn); in setup_smp()
57 if (hart >= 0) { in setup_smp()
58 set_cpu_possible(hart, true); in setup_smp()
59 set_cpu_present(hart, true); in setup_smp()
60 if (hart == smp_processor_id()) { in setup_smp()
/Linux-v4.19/Documentation/devicetree/bindings/riscv/
Dcpus.txt22 * hart: A hardware execution context, which contains all the state mandated by
56 Description: Describes a hart context
67 Definition: The hart ID of this CPU node
83 Definition: Contains the RISC-V ISA string of this hart. These
89 This system contains two harts: a hart marked as disabled that's used for
90 low-level system tasks and should be ignored by Linux, and a second hart that
/Linux-v4.19/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.txt7 hart contexts in the system, via the external interrupt source in each hart.
9 A hart context is a privilege mode in a hardware execution thread. For example,
11 privilege modes per hart; machine mode and supervisor mode.
Driscv,cpu-intc.txt7 Every interrupt is ultimately routed through a hart's HLIC before it
8 interrupts that hart.
40 definition of the hart whose CSRs control these local interrupts.
/Linux-v4.19/drivers/clocksource/
DKconfig619 This enables the per-hart timer built into all RISC-V systems, which