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Searched refs:gpc_base (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/arch/arm/mach-imx/
Dgpc.c36 static void __iomem *gpc_base; variable
43 (sw << GPC_PGC_SW_SHIFT), gpc_base + GPC_PGC_CPU_PUPSCR); in imx_gpc_set_arm_power_up_timing()
49 (sw << GPC_PGC_SW_SHIFT), gpc_base + GPC_PGC_CPU_PDNSCR); in imx_gpc_set_arm_power_down_timing()
54 writel_relaxed(power_off, gpc_base + GPC_PGC_CPU_PDN); in imx_gpc_set_arm_power_in_lpm()
61 val = readl_relaxed(gpc_base + GPC_CNTR); in imx_gpc_set_l2_mem_power_in_lpm()
65 writel_relaxed(val, gpc_base + GPC_CNTR); in imx_gpc_set_l2_mem_power_in_lpm()
70 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_pre_suspend()
85 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_post_resume()
113 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_mask_all()
125 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_restore_all()
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Dpm-imx5.c141 static void __iomem *gpc_base; variable
160 arm_srpgcr = imx_readl(gpc_base + MXC_SRPG_ARM_SRPGCR) & in mx5_cpu_lp_set()
162 empgc0 = imx_readl(gpc_base + MXC_SRPG_EMPGC0_SRPGCR) & in mx5_cpu_lp_set()
164 empgc1 = imx_readl(gpc_base + MXC_SRPG_EMPGC1_SRPGCR) & in mx5_cpu_lp_set()
201 imx_writel(arm_srpgcr, gpc_base + MXC_SRPG_ARM_SRPGCR); in mx5_cpu_lp_set()
202 imx_writel(arm_srpgcr, gpc_base + MXC_SRPG_NEON_SRPGCR); in mx5_cpu_lp_set()
208 imx_writel(empgc0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_cpu_lp_set()
209 imx_writel(empgc1, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_cpu_lp_set()
231 imx_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_suspend_enter()
232 imx_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_suspend_enter()
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Dpm-imx6.c231 struct imx6_pm_base gpc_base; member
545 ret = imx6_pm_get_base(&pm_info->gpc_base, socdata->gpc_compat); in imx6q_suspend_init()
580 iounmap(pm_info->gpc_base.vbase); in imx6q_suspend_init()
/Linux-v4.19/drivers/irqchip/
Dirq-imx-gpcv2.c23 void __iomem *gpc_base; member
42 reg = cd->gpc_base + cd->cpu2wakeup + i * 4; in gpcv2_wakeup_source_save()
61 reg = cd->gpc_base + cd->cpu2wakeup + i * 4; in gpcv2_wakeup_source_restore()
80 reg = cd->gpc_base + cd->cpu2wakeup + idx * 4; in imx_gpcv2_irq_set_wake()
102 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_unmask()
118 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_mask()
221 cd->gpc_base = of_iomap(node, 0); in imx_gpcv2_irqchip_init()
222 if (!cd->gpc_base) { in imx_gpcv2_irqchip_init()
231 iounmap(cd->gpc_base); in imx_gpcv2_irqchip_init()
239 writel_relaxed(~0, cd->gpc_base + GPC_IMR1_CORE0 + i * 4); in imx_gpcv2_irqchip_init()
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