Searched refs:gic_irq (Results 1 – 5 of 5) sorted by relevance
| /Linux-v4.19/drivers/pci/controller/ |
| D | pci-xgene-msi.c | 28 int gic_irq; member
384 if (!msi_group->gic_irq) in xgene_msi_hwirq_alloc()
387 irq_set_chained_handler(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
389 err = irq_set_handler_data(msi_group->gic_irq, msi_group); in xgene_msi_hwirq_alloc()
402 err = irq_set_affinity(msi_group->gic_irq, mask); in xgene_msi_hwirq_alloc()
412 irq_set_chained_handler_and_data(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
429 if (!msi_group->gic_irq) in xgene_msi_hwirq_free()
432 irq_set_chained_handler_and_data(msi_group->gic_irq, NULL, in xgene_msi_hwirq_free()
486 xgene_msi->msi_groups[irq_index].gic_irq = virt_msir; in xgene_msi_probe()
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| D | pcie-iproc-msi.c | 63 int gic_irq; member
471 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_free()
483 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_setup()
490 ret = irq_set_affinity(msi->grps[i].gic_irq, mask); in iproc_msi_irq_setup()
494 msi->grps[i].gic_irq); in iproc_msi_irq_setup()
599 msi->grps[i].gic_irq = irq; in iproc_msi_init()
640 if (msi->grps[i].gic_irq) in iproc_msi_init()
641 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_init()
667 if (msi->grps[i].gic_irq) in iproc_msi_exit()
668 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_exit()
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| /Linux-v4.19/drivers/irqchip/ |
| D | irq-ls-scfg-msi.c | 41 unsigned int gic_irq; member
123 if (msi_data->msir[cpu].gic_irq <= 0) { in ls_scfg_msi_set_affinity()
252 msir->gic_irq = virq; in ls_scfg_msi_setup_hwirq()
265 irq_set_chained_handler_and_data(msir->gic_irq, in ls_scfg_msi_setup_hwirq()
271 irq_set_affinity(msir->gic_irq, get_cpu_mask(index)); in ls_scfg_msi_setup_hwirq()
292 if (msir->gic_irq > 0) in ls_scfg_msi_teardown_hwirq()
293 irq_set_chained_handler_and_data(msir->gic_irq, NULL, NULL); in ls_scfg_msi_teardown_hwirq()
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| D | irq-gic.c | 174 static inline unsigned int gic_irq(struct irq_data *d) in gic_irq() function
195 u32 mask = 1 << (gic_irq(d) % 32); in gic_poke_irq()
196 writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4); in gic_poke_irq()
201 u32 mask = 1 << (gic_irq(d) % 32); in gic_peek_irq()
202 return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask); in gic_peek_irq()
232 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); in gic_eoi_irq()
241 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_DEACTIVATE); in gic_eoimode1_eoi_irq()
296 unsigned int gicirq = gic_irq(d); in gic_set_type()
327 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); in gic_set_affinity()
328 unsigned int cpu, shift = (gic_irq(d) % 4) * 8; in gic_set_affinity()
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| D | irq-gic-v3.c | 77 static inline unsigned int gic_irq(struct irq_data *d) in gic_irq() function
84 return gic_irq(d) < 32; in gic_irq_in_rdist()
175 u32 mask = 1 << (gic_irq(d) % 32); in gic_peek_irq()
183 return !!(readl_relaxed(base + offset + (gic_irq(d) / 32) * 4) & mask); in gic_peek_irq()
188 u32 mask = 1 << (gic_irq(d) % 32); in gic_poke_irq()
200 writel_relaxed(mask, base + offset + (gic_irq(d) / 32) * 4); in gic_poke_irq()
286 gic_write_eoir(gic_irq(d)); in gic_eoi_irq()
295 if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d)) in gic_eoimode1_eoi_irq()
297 gic_write_dir(gic_irq(d)); in gic_eoimode1_eoi_irq()
302 unsigned int irq = gic_irq(d); in gic_set_type()
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