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Searched refs:ggtt_offset (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_ringbuffer.h33 u32 ggtt_offset; member
947 return engine->status_page.ggtt_offset + I915_GEM_HWS_INDEX_ADDR; in intel_hws_seqno_address()
952 return engine->status_page.ggtt_offset + I915_GEM_HWS_PREEMPT_ADDR; in intel_hws_preempt_done_address()
Dintel_lrc.c1759 engine->status_page.ggtt_offset); in enable_execlists()
2610 u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); in execlists_init_reg_state() local
2613 (ggtt_offset + wa_ctx->indirect_ctx.offset) | in execlists_init_reg_state()
2622 u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); in execlists_init_reg_state() local
2625 (ggtt_offset + wa_ctx->per_ctx.offset) | 0x01; in execlists_init_reg_state()
Di915_gem_gtt.h227 u32 ggtt_offset; member
Dintel_ringbuffer.c403 I915_WRITE(mmio, engine->status_page.ggtt_offset); in intel_ring_setup_status_page()
1499 *cs++ = ppgtt->pd.base.ggtt_offset << 10; in load_pd_dir()
Di915_gem_gtt.c2051 u32 ggtt_offset = i915_ggtt_offset(vma) / PAGE_SIZE; in pd_vma_bind() local
2055 ppgtt->base.pd.base.ggtt_offset = ggtt_offset * sizeof(gen6_pte_t); in pd_vma_bind()
2056 ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset; in pd_vma_bind()
Dintel_engine_cs.c612 engine->status_page.ggtt_offset = i915_ggtt_offset(vma); in init_status_page()
Di915_debugfs.c2134 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd.base.ggtt_offset); in gen6_ppgtt_info()