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Searched refs:get_wptr (Results 1 – 25 of 32) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/radeon/
Dradeon_asic.c192 .get_wptr = &r100_gfx_get_wptr,
342 .get_wptr = &r100_gfx_get_wptr,
356 .get_wptr = &r100_gfx_get_wptr,
913 .get_wptr = &r600_gfx_get_wptr,
926 .get_wptr = &r600_dma_get_wptr,
1011 .get_wptr = &uvd_v1_0_get_wptr,
1210 .get_wptr = &uvd_v1_0_get_wptr,
1317 .get_wptr = &r600_gfx_get_wptr,
1330 .get_wptr = &r600_dma_get_wptr,
1626 .get_wptr = &cayman_gfx_get_wptr,
[all …]
/Linux-v4.19/drivers/gpu/drm/msm/adreno/
Da5xx_preempt.c58 wptr = get_wptr(ring); in update_wptr()
75 empty = (get_wptr(ring) == ring->memptrs->rptr); in get_next_ring()
145 a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring); in a5xx_preempt_trigger()
Dadreno_gpu.c358 wptr = get_wptr(ring); in adreno_flush()
369 uint32_t wptr = get_wptr(ring); in adreno_idle()
398 state->ring[i].wptr = get_wptr(gpu->rb[i]); in adreno_gpu_state_get()
588 printk("rb wptr: %d\n", get_wptr(ring)); in adreno_dump_info()
Dadreno_gpu.h349 static inline uint32_t get_wptr(struct msm_ringbuffer *ring) in get_wptr() function
Da6xx_gpu.c58 wptr = get_wptr(ring); in a6xx_flush()
Da5xx_gpu.c135 wptr = get_wptr(ring); in a5xx_flush()
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dsi_ih.c303 .get_wptr = si_ih_get_wptr,
Damdgpu_ring.h122 u64 (*get_wptr)(struct amdgpu_ring *ring); member
Dcik_ih.c463 .get_wptr = cik_ih_get_wptr,
Dcz_ih.c444 .get_wptr = cz_ih_get_wptr,
Diceland_ih.c442 .get_wptr = iceland_ih_get_wptr,
Dvce_v3_0.c900 .get_wptr = vce_v3_0_ring_get_wptr,
923 .get_wptr = vce_v3_0_ring_get_wptr,
Duvd_v6_0.c1532 .get_wptr = uvd_v6_0_ring_get_wptr,
1557 .get_wptr = uvd_v6_0_ring_get_wptr,
1585 .get_wptr = uvd_v6_0_enc_ring_get_wptr,
Dtonga_ih.c508 .get_wptr = tonga_ih_get_wptr,
Dvcn_v1_0.c1661 .get_wptr = vcn_v1_0_dec_ring_get_wptr,
1694 .get_wptr = vcn_v1_0_enc_ring_get_wptr,
1726 .get_wptr = vcn_v1_0_jpeg_ring_get_wptr,
Dvce_v2_0.c613 .get_wptr = vce_v2_0_ring_get_wptr,
Dvega10_ih.c499 .get_wptr = vega10_ih_get_wptr,
Damdgpu.h331 u32 (*get_wptr)(struct amdgpu_device *adev); member
1717 #define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))
1735 #define amdgpu_ih_get_wptr(adev) (adev)->irq.ih_funcs->get_wptr((adev))
Duvd_v4_2.c754 .get_wptr = uvd_v4_2_ring_get_wptr,
Duvd_v5_0.c863 .get_wptr = uvd_v5_0_ring_get_wptr,
Dsi_dma.c757 .get_wptr = si_dma_ring_get_wptr,
Duvd_v7_0.c1775 .get_wptr = uvd_v7_0_ring_get_wptr,
1807 .get_wptr = uvd_v7_0_enc_ring_get_wptr,
Dvce_v4_0.c1070 .get_wptr = vce_v4_0_ring_get_wptr,
Dcik_sdma.c1266 .get_wptr = cik_sdma_ring_get_wptr,
Dsdma_v2_4.c1191 .get_wptr = sdma_v2_4_ring_get_wptr,

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