Searched refs:fifo_state (Results 1 – 8 of 8) sorted by relevance
300 struct vmw_fifo_state *fifo_state = &dev_priv->fifo; in vmw_local_fifo_reserve() local305 uint32_t reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE; in vmw_local_fifo_reserve()308 mutex_lock(&fifo_state->fifo_mutex); in vmw_local_fifo_reserve()316 BUG_ON(fifo_state->reserved_size != 0); in vmw_local_fifo_reserve()317 BUG_ON(fifo_state->dynamic_buffer != NULL); in vmw_local_fifo_reserve()319 fifo_state->reserved_size = bytes; in vmw_local_fifo_reserve()353 fifo_state->using_bounce_buffer = false; in vmw_local_fifo_reserve()366 fifo_state->using_bounce_buffer = true; in vmw_local_fifo_reserve()367 if (bytes < fifo_state->static_buffer_size) in vmw_local_fifo_reserve()368 return fifo_state->static_buffer; in vmw_local_fifo_reserve()[all …]
117 struct vmw_fifo_state *fifo_state) in vmw_update_seqno() argument124 vmw_marker_pull(&fifo_state->marker_queue, seqno); in vmw_update_seqno()132 struct vmw_fifo_state *fifo_state; in vmw_seqno_passed() local138 fifo_state = &dev_priv->fifo; in vmw_seqno_passed()139 vmw_update_seqno(dev_priv, fifo_state); in vmw_seqno_passed()143 if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE) && in vmw_seqno_passed()165 struct vmw_fifo_state *fifo_state = &dev_priv->fifo; in vmw_fallback_wait() local182 down_read(&fifo_state->rwsem); in vmw_fallback_wait()232 up_read(&fifo_state->rwsem); in vmw_fallback_wait()
891 struct vmw_fifo_state *fifo_state);
218 { u_char fifo_state; in hfcpci_clear_fifo_rx() local223 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()226 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()228 if (fifo_state) in hfcpci_clear_fifo_rx()229 cs->hw.hfcpci.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()236 if (fifo_state) in hfcpci_clear_fifo_rx()237 cs->hw.hfcpci.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()245 { u_char fifo_state; in hfcpci_clear_fifo_tx() local250 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()253 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()[all …]
338 u_char fifo_state; in hfcpci_clear_fifo_rx() local343 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()346 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()348 if (fifo_state) in hfcpci_clear_fifo_rx()349 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()357 if (fifo_state) in hfcpci_clear_fifo_rx()358 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()367 u_char fifo_state; in hfcpci_clear_fifo_tx() local372 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()375 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()[all …]
477 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_get_fifo_size() local506 fifo_state->plane[PLANE_PRIMARY] = sprite0_start; in vlv_get_fifo_size()507 fifo_state->plane[PLANE_SPRITE0] = sprite1_start - sprite0_start; in vlv_get_fifo_size()508 fifo_state->plane[PLANE_SPRITE1] = 511 - sprite1_start; in vlv_get_fifo_size()509 fifo_state->plane[PLANE_CURSOR] = 63; in vlv_get_fifo_size()1649 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_compute_fifo() local1684 fifo_state->plane[plane_id] = 0; in vlv_compute_fifo()1689 fifo_state->plane[plane_id] = fifo_size * rate / total_rate; in vlv_compute_fifo()1690 fifo_left -= fifo_state->plane[plane_id]; in vlv_compute_fifo()1693 fifo_state->plane[PLANE_SPRITE0] += sprite0_fifo_extra; in vlv_compute_fifo()[all …]
690 struct vlv_fifo_state fifo_state; member
665 u64 tmp, fifo_state; in nicvf_reclaim_rbdr() local679 fifo_state = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_STATUS0, qidx); in nicvf_reclaim_rbdr()680 if (((fifo_state >> 62) & 0x03) == 0x3) in nicvf_reclaim_rbdr()
