Searched refs:fifo_base (Results 1 – 5 of 5) sorted by relevance
77 u32 fifo_base; member175 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_start_rx()213 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_start_tx()268 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_stop_rx()293 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_stop_tx()793 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_common_hw_param()797 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_common_hw_param()1401 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_suspend()1405 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_suspend()1431 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_resume()[all …]
80 u32 *fifo_base; member200 priv->fifo_ptr = priv->fifo_base; in ps3vram_rewind_ring()210 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base) in ps3vram_fire_ring()219 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > in ps3vram_fire_ring()642 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); in ps3vram_probe()643 priv->fifo_ptr = priv->fifo_base; in ps3vram_probe()
1115 void *fifo_base; in qcom_smd_create_channel() local1154 fifo_base = qcom_smem_get(edge->remote_pid, smem_fifo_item, &fifo_size); in qcom_smd_create_channel()1155 if (IS_ERR(fifo_base)) { in qcom_smd_create_channel()1156 ret = PTR_ERR(fifo_base); in qcom_smd_create_channel()1166 channel->tx_fifo = fifo_base; in qcom_smd_create_channel()1167 channel->rx_fifo = fifo_base + fifo_size; in qcom_smd_create_channel()
373 unsigned long fifo_base; /* RX FIFO base in SRAM */ member
3130 card->fifo_base = SAR_SRAM_FIFO_128_BASE; in init_sram()3148 card->fifo_base = SAR_SRAM_FIFO_32_BASE; in init_sram()3243 writel(card->fifo_size | (card->fifo_base << 2), in init_sram()
