Searched refs:fclk_khz (Results 1 – 5 of 5) sorted by relevance
586 || new_clocks->fclk_khz > dccg->clks.fclk_khz in dcn1_update_clocks()596 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, dccg->clks.fclk_khz)) { in dcn1_update_clocks()597 dccg->clks.fclk_khz = new_clocks->fclk_khz; in dcn1_update_clocks()599 clock_voltage_req.clocks_in_khz = new_clocks->fclk_khz; in dcn1_update_clocks()600 smu_req.hard_min_fclk_khz = new_clocks->fclk_khz; in dcn1_update_clocks()
359 context->bw.dcn.clk.fclk_khz, in context_clock_trace()367 context->bw.dcn.clk.fclk_khz, in context_clock_trace()
209 int fclk_khz; member
1041 context->bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 / in dcn_validate_bandwidth()1044 context->bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 / 32); in dcn_validate_bandwidth()1306 dc, DM_PP_CLOCK_TYPE_MEMORY_CLK, clocks->fclk_khz); in dcn_find_dcfclk_suits_all()
345 dc->current_state->bw.dcn.clk.fclk_khz, in dcn10_log_hw_state()2223 pp_display_cfg->min_memory_clock_khz = dc->res_pool->dccg->clks.fclk_khz; in dcn10_pplib_apply_display_requirements()
