| /Linux-v4.19/drivers/clk/zynq/ |
| D | pll.c | 66 u32 fbdiv; in zynq_pll_round_rate() local
68 fbdiv = DIV_ROUND_CLOSEST(rate, *prate); in zynq_pll_round_rate()
69 if (fbdiv < PLL_FBDIV_MIN) in zynq_pll_round_rate()
70 fbdiv = PLL_FBDIV_MIN; in zynq_pll_round_rate()
71 else if (fbdiv > PLL_FBDIV_MAX) in zynq_pll_round_rate()
72 fbdiv = PLL_FBDIV_MAX; in zynq_pll_round_rate()
74 return *prate * fbdiv; in zynq_pll_round_rate()
87 u32 fbdiv; in zynq_pll_recalc_rate() local
93 fbdiv = (clk_readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >> in zynq_pll_recalc_rate()
96 return parent_rate * fbdiv; in zynq_pll_recalc_rate()
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| /Linux-v4.19/arch/mips/ralink/ |
| D | mt7621.c | 122 int fbdiv = 0; in ralink_clk_init() local
139 fbdiv = ((rt_sysc_r32(0x648) >> 4) & 0x7F) + 1; in ralink_clk_init()
144 cpu_clk = 25 * fbdiv * 1000 * 1000; in ralink_clk_init()
147 cpu_clk = 40 * fbdiv * 1000 * 1000; in ralink_clk_init()
150 cpu_clk = 20 * fbdiv * 1000 * 1000; in ralink_clk_init()
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| /Linux-v4.19/drivers/clk/pistachio/ |
| D | clk-pll.c | 214 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate()
233 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT); in pll_gf40lp_frac_set_rate()
276 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
280 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK; in pll_gf40lp_frac_recalc_rate()
292 rate *= (fbdiv << 24) + frac; in pll_gf40lp_frac_recalc_rate()
294 rate *= (fbdiv << 24); in pll_gf40lp_frac_recalc_rate()
369 vco = div_u64(params->fref * params->fbdiv, params->refdiv); in pll_gf40lp_laint_set_rate()
401 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT) | in pll_gf40lp_laint_set_rate()
416 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
421 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK; in pll_gf40lp_laint_recalc_rate()
[all …]
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| D | clk.h | 101 unsigned long long fbdiv; member
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| /Linux-v4.19/drivers/clk/axs10x/ |
| D | i2s_pll_clock.c | 29 unsigned int fbdiv; member
104 unsigned int idiv, fbdiv, odiv; in i2s_pll_recalc_rate() local
107 fbdiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_FBDIV_REG)); in i2s_pll_recalc_rate()
110 return ((parent_rate / idiv) * fbdiv) / odiv; in i2s_pll_recalc_rate()
147 i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv); in i2s_pll_set_rate()
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| D | pll_clock.c | 72 u32 fbdiv; member
142 u32 idiv, fbdiv, odiv; in axs10x_pll_recalc_rate() local
146 fbdiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_FBDIV)); in axs10x_pll_recalc_rate()
149 rate = (u64)parent_rate * fbdiv; in axs10x_pll_recalc_rate()
188 axs10x_encode_div(pll_cfg[i].fbdiv, 0)); in axs10x_pll_set_rate()
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| /Linux-v4.19/drivers/clk/rockchip/ |
| D | clk-pll.c | 143 rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT) in rockchip_rk3036_pll_get_params()
170 rate64 *= cur.fbdiv; in rockchip_rk3036_pll_recalc_rate()
199 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3036_pll_set_params()
212 writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3036_PLLCON0_FBDIV_MASK, in rockchip_rk3036_pll_set_params()
316 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2, in rockchip_rk3036_pll_init()
319 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2, in rockchip_rk3036_pll_init()
322 if (rate->fbdiv != cur.fbdiv || rate->postdiv1 != cur.postdiv1 || in rockchip_rk3036_pll_init()
618 rate->fbdiv = ((pllcon >> RK3399_PLLCON0_FBDIV_SHIFT) in rockchip_rk3399_pll_get_params()
647 rate64 *= cur.fbdiv; in rockchip_rk3399_pll_recalc_rate()
676 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3399_pll_set_params()
[all …]
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| D | clk.h | 198 .fbdiv = _fbdiv, \
247 unsigned int fbdiv; member
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| /Linux-v4.19/drivers/clk/berlin/ |
| D | berlin2-pll.c | 46 u32 val, fbdiv, rfdiv, vcodivsel, vcodiv; in berlin2_pll_recalc_rate() local
50 fbdiv = (val >> map->fbdiv_shift) & FBDIV_MASK; in berlin2_pll_recalc_rate()
66 rate *= fbdiv * map->mult; in berlin2_pll_recalc_rate()
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| D | berlin2-avpll.c | 159 u32 reg, refdiv, fbdiv; in berlin2_avpll_vco_recalc_rate() local
166 fbdiv = (reg & VCO_FBDIV_MASK) >> VCO_FBDIV_SHIFT; in berlin2_avpll_vco_recalc_rate()
167 freq *= fbdiv; in berlin2_avpll_vco_recalc_rate()
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| /Linux-v4.19/drivers/clk/ |
| D | clk-hsdk-pll.c | 52 u32 fbdiv; member
138 val |= cfg->fbdiv << CGU_PLL_CTRL_FBDIV_SHIFT; in hsdk_pll_set_cfg()
167 u32 idiv, fbdiv, odiv; in hsdk_pll_recalc_rate() local
185 fbdiv = 2 * (1 + ((val & CGU_PLL_CTRL_FBDIV_MASK) >> CGU_PLL_CTRL_FBDIV_SHIFT)); in hsdk_pll_recalc_rate()
189 rate = (u64)parent_rate * fbdiv; in hsdk_pll_recalc_rate()
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| D | clk-axm5516.c | 55 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
60 fbdiv = ((control >> 4) & 0xfff) + 3; in axxia_pllclk_recalc()
62 rate = (parent_rate / (refdiv * postdiv)) * fbdiv; in axxia_pllclk_recalc()
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| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | rv740_dpm.c | 134 u32 fbdiv; in rv740_populate_sclk_value() local
146 fbdiv = (u32) tmp; in rv740_populate_sclk_value()
156 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv740_populate_sclk_value()
166 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in rv740_populate_sclk_value()
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| D | rv730_dpm.c | 54 u32 fbdiv; in rv730_populate_sclk_value() local
72 fbdiv = (u32) tmp; in rv730_populate_sclk_value()
88 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv730_populate_sclk_value()
98 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv730_populate_sclk_value()
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| D | rs780_dpm.c | 211 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() local
213 WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(fbdiv), in rs780_preset_starting_fbdiv()
216 WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(fbdiv), in rs780_preset_starting_fbdiv()
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| D | rv770_dpm.c | 503 u32 fbdiv; in rv770_populate_sclk_value() local
520 fbdiv = (u32) tmp; in rv770_populate_sclk_value()
535 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv770_populate_sclk_value()
545 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv770_populate_sclk_value()
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| D | ni_dpm.c | 2012 u32 fbdiv; in ni_calculate_sclk_params() local
2025 fbdiv = (u32) tmp; in ni_calculate_sclk_params()
2035 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in ni_calculate_sclk_params()
2045 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ni_calculate_sclk_params()
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| D | si_dpm.c | 4795 u32 fbdiv; in si_calculate_sclk_params() local
4807 fbdiv = (u32) tmp; in si_calculate_sclk_params()
4817 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in si_calculate_sclk_params()
4827 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params()
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| /Linux-v4.19/drivers/soc/xilinx/ |
| D | xlnx_vcu.c | 124 u32 fbdiv; member
346 fvco = cfg->fbdiv * refclk; in xvcu_set_vcu_pll_info()
384 vcu_pll_ctrl |= (found->fbdiv & VCU_PLL_CTRL_FBDIV_MASK) << in xvcu_set_vcu_pll_info()
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| /Linux-v4.19/drivers/gpu/drm/bridge/ |
| D | cdns-dsi.c | 557 u64 dlane_bps, dlane_bps_max, fbdiv, fbdiv_max, adj_dsi_htotal; in cdns_dsi_get_dphy_pll_cfg() local
612 fbdiv = DIV_ROUND_UP_ULL(dlane_bps * 2 * cfg->pll_opdiv * in cdns_dsi_get_dphy_pll_cfg()
648 for (; fbdiv <= fbdiv_max; fbdiv++) { in cdns_dsi_get_dphy_pll_cfg()
651 adj_dsi_htotal = (u64)fbdiv * pll_ref_hz * dsi_nlanes * in cdns_dsi_get_dphy_pll_cfg()
667 cfg->pll_fbdiv = fbdiv; in cdns_dsi_get_dphy_pll_cfg()
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| /Linux-v4.19/arch/arm/common/ |
| D | sa1111.c | 1186 unsigned int skcdr, fbdiv, ipdiv, opdiv; in __sa1111_pll_clock() local
1190 fbdiv = (skcdr & 0x007f) + 2; in __sa1111_pll_clock()
1194 return 3686400 * fbdiv / (ipdiv * opdiv); in __sa1111_pll_clock()
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| /Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | fiji_smumgr.c | 879 uint32_t fbdiv; in fiji_calculate_sclk_params() local
894 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in fiji_calculate_sclk_params()
904 SPLL_FB_DIV, fbdiv); in fiji_calculate_sclk_params()
927 fbdiv / (clk_s * 10000); in fiji_calculate_sclk_params()
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| D | iceland_smumgr.c | 807 uint32_t fbdiv; in iceland_calculate_sclk_params() local
822 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in iceland_calculate_sclk_params()
832 CG_SPLL_FUNC_CNTL_3, SPLL_FB_DIV, fbdiv); in iceland_calculate_sclk_params()
852 uint32_t clkV = 4 * ss_info.speed_spectrum_percentage * fbdiv / (clkS * 10000); in iceland_calculate_sclk_params()
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| D | ci_smumgr.c | 306 uint32_t fbdiv; in ci_calculate_sclk_params() local
321 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in ci_calculate_sclk_params()
331 SPLL_FB_DIV, fbdiv); in ci_calculate_sclk_params()
347 fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()
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| D | tonga_smumgr.c | 540 uint32_t fbdiv; in tonga_calculate_sclk_params() local
555 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in tonga_calculate_sclk_params()
565 CG_SPLL_FUNC_CNTL_3, SPLL_FB_DIV, fbdiv); in tonga_calculate_sclk_params()
585 uint32_t clkV = 4 * ss_info.speed_spectrum_percentage * fbdiv / (clkS * 10000); in tonga_calculate_sclk_params()
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