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Searched refs:engine_mask (Results 1 – 13 of 13) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dscheduler.h144 unsigned long engine_mask);
149 unsigned long engine_mask,
162 unsigned long engine_mask);
Dexeclist.c530 static void clean_execlist(struct intel_vgpu *vgpu, unsigned long engine_mask) in clean_execlist() argument
537 for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { in clean_execlist()
545 unsigned long engine_mask) in reset_execlist() argument
551 for_each_engine_masked(engine, dev_priv, engine_mask, tmp) in reset_execlist()
556 unsigned long engine_mask) in init_execlist() argument
558 reset_execlist(vgpu, engine_mask); in init_execlist()
Dscheduler.c788 unsigned long engine_mask) in intel_vgpu_clean_workloads() argument
797 for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { in intel_vgpu_clean_workloads()
1078 unsigned long engine_mask) in intel_vgpu_reset_submission() argument
1085 intel_vgpu_clean_workloads(vgpu, engine_mask); in intel_vgpu_reset_submission()
1086 s->ops->reset(vgpu, engine_mask); in intel_vgpu_reset_submission()
1150 unsigned long engine_mask, in intel_vgpu_select_submission_ops() argument
1163 if (WARN_ON(interface == 0 && engine_mask != ALL_ENGINES)) in intel_vgpu_select_submission_ops()
1167 s->ops->clean(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
1177 ret = ops[interface]->init(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
Dvgpu.c523 unsigned int engine_mask) in intel_gvt_reset_vgpu_locked() argument
527 unsigned int resetting_eng = dmlr ? ALL_ENGINES : engine_mask; in intel_gvt_reset_vgpu_locked()
531 vgpu->id, dmlr, engine_mask); in intel_gvt_reset_vgpu_locked()
548 if (engine_mask == ALL_ENGINES || dmlr) { in intel_gvt_reset_vgpu_locked()
Dgvt.h151 int (*init)(struct intel_vgpu *vgpu, unsigned long engine_mask);
152 void (*clean)(struct intel_vgpu *vgpu, unsigned long engine_mask);
153 void (*reset)(struct intel_vgpu *vgpu, unsigned long engine_mask);
491 unsigned int engine_mask);
Dexeclist.h183 unsigned long engine_mask);
Dhandlers.c314 unsigned int engine_mask = 0; in gdrst_mmio_write() local
322 engine_mask = ALL_ENGINES; in gdrst_mmio_write()
326 engine_mask |= (1 << RCS); in gdrst_mmio_write()
330 engine_mask |= (1 << VCS); in gdrst_mmio_write()
334 engine_mask |= (1 << BCS); in gdrst_mmio_write()
338 engine_mask |= (1 << VECS); in gdrst_mmio_write()
343 engine_mask |= (1 << VCS2); in gdrst_mmio_write()
348 intel_gvt_reset_vgpu_locked(vgpu, false, engine_mask); in gdrst_mmio_write()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_uncore.c1732 unsigned engine_mask) in i915_stop_engines() argument
1740 for_each_engine_masked(engine, dev_priv, engine_mask, id) in i915_stop_engines()
1752 static int i915_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) in i915_do_reset() argument
1779 static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) in g33_do_reset() argument
1787 static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) in g4x_do_reset() argument
1824 unsigned engine_mask) in ironlake_do_reset() argument
1890 unsigned engine_mask) in gen6_reset_engines() argument
1902 if (engine_mask == ALL_ENGINES) { in gen6_reset_engines()
1908 for_each_engine_masked(engine, dev_priv, engine_mask, tmp) in gen6_reset_engines()
1929 unsigned engine_mask) in gen11_reset_engines() argument
[all …]
Di915_gpu_error.h327 u32 engine_mask,
350 u32 engine_mask, in i915_capture_error_state() argument
Di915_irq.c3162 u32 engine_mask, in i915_reset_device() argument
3182 error->stalled_mask = engine_mask; in i915_reset_device()
3194 i915_reset(dev_priv, engine_mask, reason); in i915_reset_device()
3251 u32 engine_mask, in i915_handle_error() argument
3279 engine_mask &= INTEL_INFO(dev_priv)->ring_mask; in i915_handle_error()
3282 i915_capture_error_state(dev_priv, engine_mask, msg); in i915_handle_error()
3291 for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { in i915_handle_error()
3298 engine_mask &= ~intel_engine_flag(engine); in i915_handle_error()
3307 if (!engine_mask) in i915_handle_error()
3327 i915_reset_device(dev_priv, engine_mask, msg); in i915_handle_error()
Di915_gpu_error.c1706 u32 engine_mask, in i915_error_capture_msg() argument
1728 engine_mask ? "reset" : "continue"); in i915_error_capture_msg()
1840 u32 engine_mask, in i915_capture_error_state() argument
1859 i915_error_capture_msg(i915, error, engine_mask, error_msg); in i915_capture_error_state()
Di915_drv.h2711 extern int intel_gpu_reset(struct drm_i915_private *dev_priv, u32 engine_mask);
2768 u32 engine_mask,
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/
Dmt76x2_dfs.c627 u32 engine_mask; in mt76x2_dfs_tasklet() local
651 engine_mask = mt76_rr(dev, MT_BBP(DFS, 1)); in mt76x2_dfs_tasklet()
652 if (!(engine_mask & 0xf)) in mt76x2_dfs_tasklet()
658 if (!(engine_mask & (1 << i))) in mt76x2_dfs_tasklet()