Searched refs:enabled_mask (Results 1 – 7 of 7) sorted by relevance
37 volatile unsigned long enabled_mask; member88 clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_mask_irq()97 set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_unmask_irq()139 mdp5_mdss->irqcontroller.enabled_mask = 0; in mdss_irq_domain_init()
59 clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_mask()70 set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_unmask()112 dpu_mdss->irq_controller.enabled_mask = 0; in _dpu_mdss_irq_domain_add()
27 unsigned long enabled_mask; member
120 unsigned int enabled_mask; member291 chip->enabled_mask = 0; in pcmuio_stop_intr()316 if (!(triggered & chip->enabled_mask)) in pcmuio_handle_intr_subdev()386 chip->enabled_mask = 0; in pcmuio_start_intr()400 chip->enabled_mask = bits; in pcmuio_start_intr()
181 unsigned int enabled_mask; member314 devpriv->enabled_mask = 0; in pcmmio_stop_intr()337 if (!(triggered & devpriv->enabled_mask)) in pcmmio_handle_dio_intr()390 devpriv->enabled_mask = 0; in pcmmio_start_intr()404 devpriv->enabled_mask = bits; in pcmmio_start_intr()
762 u8 enabled_mask = (ss_mask | ss_mask >> in wa_init_mcr() local770 WARN_ON((enabled_mask & disabled_mask) != enabled_mask); in wa_init_mcr()
131 u8 enabled_mask = asd_ha->hw_prof.enabled_phys; in ord_phy() local134 for_each_phy(enabled_mask, enabled_mask, i) { in ord_phy()
