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Searched refs:enable_val (Results 1 – 20 of 20) sorted by relevance

/Linux-v4.19/drivers/phy/samsung/
Dphy-exynos-mipi-video.c49 u32 enable_val; member
66 .enable_val = EXYNOS4_PHY_ENABLE,
75 .enable_val = EXYNOS4_PHY_ENABLE,
84 .enable_val = EXYNOS4_PHY_ENABLE,
93 .enable_val = EXYNOS4_PHY_ENABLE,
111 .enable_val = EXYNOS4_PHY_ENABLE,
120 .enable_val = EXYNOS4_PHY_ENABLE,
129 .enable_val = EXYNOS4_PHY_ENABLE,
138 .enable_val = EXYNOS4_PHY_ENABLE,
147 .enable_val = EXYNOS4_PHY_ENABLE,
[all …]
/Linux-v4.19/drivers/clocksource/
Djcore-pit.c39 u32 enable_val; member
75 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
141 u32 irqprio, enable_val; in jcore_pit_init() local
214 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
239 pit->enable_val = enable_val; in jcore_pit_init()
/Linux-v4.19/arch/arm/mach-mmp/
Dclock.h21 uint32_t enable_val; /* value for clock enable (APMU) */ member
48 .enable_val = _eval, \
56 .enable_val = _eval, \
Dclock-mmp2.c54 clk_rst |= clk->enable_val; in sdhc_clk_enable()
63 clk_rst &= ~clk->enable_val; in sdhc_clk_disable()
Dclock.c39 __raw_writel(clk->enable_val, clk->clk_rst); in apmu_clk_enable()
/Linux-v4.19/drivers/regulator/
Dhelpers.c43 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
44 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
47 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
48 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
70 val = rdev->desc->enable_val; in regulator_enable_regmap()
94 val = rdev->desc->enable_val; in regulator_disable_regmap()
Dcpcap-regulator.c123 .enable_val = (mode_val), \
180 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
200 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
208 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
Dtps6105x-regulator.c51 .enable_val = TPS6105X_REG0_MODE_VOLTAGE <<
Dstw481x-vmmc.c51 .enable_val = STW_CONF1_PDN_VMMC,
Ds5m8767.c925 int enable_reg, enable_val; in s5m8767_pmic_probe() local
942 &enable_val); in s5m8767_pmic_probe()
949 regulators[id].enable_val = enable_val; in s5m8767_pmic_probe()
Duniphier-regulator.c143 .enable_val = USB3VBUS_REG_EN | USB3VBUS_REG,
Dsc2731-regulator.c142 .enable_val = 0, \
Dpbias-regulator.c225 drvdata[data_idx].desc.enable_val = info->enable; in pbias_regulator_probe()
Dpalmas-regulator.c478 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; in palmas_set_mode_smps()
1267 desc->enable_val = SMPS_CTRL_MODE_ON; in palmas_smps_registration()
1375 desc->enable_val = SMPS_CTRL_MODE_ON; in tps65917_smps_registration()
Dtps65090-regulator.c204 .enable_val = _en_bits, \
Dpfuze100-regulator.c736 desc->enable_val = 0x8; in pfuze100_regulator_probe()
Daxp20x-regulator.c58 .enable_val = (_enable_val), \
Dqcom_spmi-regulator.c1812 vreg->desc.enable_val = SPMI_COMMON_ENABLE; in qcom_spmi_regulator_probe()
/Linux-v4.19/include/linux/regulator/
Ddriver.h353 unsigned int enable_val; member