Searched refs:enable_post_div (Results 1 – 8 of 8) sorted by relevance
64 if (dividers.enable_post_div) in rv730_populate_sclk_value()75 if (dividers.enable_post_div) in rv730_populate_sclk_value()142 if (dividers.enable_post_div) in rv730_populate_mclk_value()149 if (dividers.enable_post_div) in rv730_populate_mclk_value()
596 bool enable_post_div; member
2860 dividers->enable_post_div = true; in radeon_atom_get_clock_dividers()2876 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()2880 dividers->enable_post_div = (dividers->fb_div & 1) ? true : false; in radeon_atom_get_clock_dividers()2888 dividers->enable_post_div = (args.v3.ucCntlFlag & in radeon_atom_get_clock_dividers()2908 dividers->enable_post_div = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
150 if (dividers.enable_post_div) in rv6xx_convert_clock_to_stepping()611 if (dividers.enable_post_div) in rv6xx_program_mclk_stepping_entry()
90 if (dividers.enable_post_div) in rs780_initialize_dpm_power_state()
513 if (dividers.enable_post_div) in rv770_populate_sclk_value()522 if (dividers.enable_post_div) in rv770_populate_sclk_value()
44 bool enable_post_div; member
1039 dividers->enable_post_div = (args.v3.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()1059 dividers->enable_post_div = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()
