Searched refs:eclk (Results 1 – 13 of 13) sorted by relevance
52 clocks = <&eclk>;190 eclk: eclk { label
52 struct clk *eclk; member716 ctx->eclk = devm_clk_get(dev, "decon0_eclk"); in decon_probe()717 if (IS_ERR(ctx->eclk)) { in decon_probe()719 ret = PTR_ERR(ctx->eclk); in decon_probe()792 clk_disable_unprepare(ctx->eclk); in exynos7_decon_suspend()816 ret = clk_prepare_enable(ctx->eclk); in exynos7_decon_resume()
61 uint32_t eclk; /* VCE clock */ member
721 mm_table_record->eclk = mm_dependency_record->ulEClk; in get_mm_clock_voltage_table()
300 mm_table->entries[i].eclk = le32_to_cpu(mm_dependency_record->ulEClk); in get_mm_clock_voltage_table()
1342 dep_mm_table->entries[i].eclk) { in vega10_setup_default_dpm_tables()1344 dep_mm_table->entries[i].eclk; in vega10_setup_default_dpm_tables()1905 if (dep_table->entries[i].eclk == eclock) in vega10_populate_single_eclock_level()
65 struct dm_pp_clock_range eclk; member
968 __u32 eclk; member
678 vce_clk_table.entries[i].eclk = vce_state->evclk; in amdgpu_info_ioctl()
1220 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in vegam_populate_smc_vce_level()
1446 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in fiji_populate_smc_vce_level()
1301 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in polaris10_populate_smc_vce_level()
1374 mm_table->entries[count].eclk; in tonga_populate_smc_vce_level()
