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Searched refs:ecclk (Results 1 – 25 of 31) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/radeon/
Dtrinity_dpm.c994 (old_rps->ecclk != new_rps->ecclk)) { in trinity_set_vce_clock()
996 if (new_rps->evclk || new_rps->ecclk) in trinity_set_vce_clock()
1000 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in trinity_set_vce_clock()
1504 u32 evclk, u32 ecclk, u16 *voltage) in trinity_get_vce_clock_voltage() argument
1511 if (((evclk == 0) && (ecclk == 0)) || in trinity_get_vce_clock_voltage()
1519 (ecclk <= table->entries[i].ecclk)) { in trinity_get_vce_clock_voltage()
1555 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in trinity_apply_state_adjust_rules()
1558 new_rps->ecclk = 0; in trinity_apply_state_adjust_rules()
1575 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage); in trinity_apply_state_adjust_rules()
Dradeon_asic.h698 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
750 int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
788 int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
Dsi_dpm.c2934 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
2941 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
2949 (ecclk <= table->entries[i].ecclk)) { in si_get_vce_clock_voltage()
3006 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3007 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3011 rps->ecclk = 0; in si_apply_state_adjust_rules()
5931 (old_rps->ecclk != new_rps->ecclk)) { in si_set_vce_clock()
5933 if (new_rps->evclk || new_rps->ecclk) in si_set_vce_clock()
5937 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in si_set_vce_clock()
Dradeon.h1346 u32 ecclk; member
1439 u32 ecclk; member
1530 u32 ecclk; member
1965 int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk);
Dkv_dpm.c2155 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2158 new_rps->ecclk = 0; in kv_apply_state_adjust_rules()
2222 new_rps->evclk || new_rps->ecclk; in kv_apply_state_adjust_rules()
Dr600_dpm.c1110 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = in r600_parse_extended_power_table()
1125 rdev->pm.dpm.vce_states[i].ecclk = in r600_parse_extended_power_table()
Dni.c2719 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) in tn_set_vce_clocks() argument
2725 ecclk, false, &dividers); in tn_set_vce_clocks()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu8_hwmgr.c79 if (clock <= ptable->entries[i].ecclk) in smu8_get_eclk_level()
87 if (clock >= ptable->entries[i].ecclk) in smu8_get_eclk_level()
538 (i < vce_table->count) ? vce_table->entries[i].ecclk : 0; in smu8_upload_pptable_to_smu()
624 clock = table->entries[level].ecclk; in smu8_init_vce_limit()
626 clock = table->entries[table->count - 1].ecclk; in smu8_init_vce_limit()
1252 ptable->entries[ptable->count - 1].ecclk; in smu8_dpm_update_vce_dpm()
1686 uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; in smu8_read_sensor() local
1744 ecclk = vce_table->entries[vce_index].ecclk; in smu8_read_sensor()
1745 *((uint32_t *)value) = ecclk; in smu8_read_sensor()
Dsmu10_hwmgr.h132 uint32_t ecclk; member
Dsmu8_hwmgr.h148 uint32_t ecclk; member
Dsmu7_hwmgr.h74 uint32_t ecclk; member
Dvega10_hwmgr.h102 uint32_t ecclk; member
Dprocesspptables.c1136 vce_table->entries[i].ecclk = ((unsigned long)entry->ucECClkHigh << 16) in get_vce_clock_voltage_limit_table()
1583 vce_state->ecclk = ((uint32_t)vce_clock_info->ucECClkHigh << 16) | vce_clock_info->usECClkLow; in get_vce_state_table_entry()
Dprocess_pptables_v1_0.c1260 vce_state->ecclk = mm_dep_record->ulEClk; in ppt_get_vce_state_table_entry_v1_0()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/inc/
Dpower_state.h174 unsigned long ecclk; member
Dhwmgr.h99 uint32_t ecclk; member
153 uint32_t ecclk; member
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.h64 u32 ecclk; member
159 u32 ecclk; member
Dkv_dpm.c2223 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2226 new_rps->ecclk = 0; in kv_apply_state_adjust_rules()
2290 new_rps->evclk || new_rps->ecclk; in kv_apply_state_adjust_rules()
3276 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); in kv_check_state_equal()
Dcik.c1340 static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in cik_set_vce_clocks() argument
1348 ecclk, false, &dividers); in cik_set_vce_clocks()
Dvi.c789 static int vi_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in vi_set_vce_clocks() argument
813 ecclk, false, &dividers); in vi_set_vce_clocks()
Damdgpu_dpm.c572 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = in amdgpu_parse_extended_power_table()
588 adev->pm.dpm.vce_states[i].ecclk = in amdgpu_parse_extended_power_table()
Dsi_dpm.c3034 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
3041 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
3049 (ecclk <= table->entries[i].ecclk)) { in si_get_vce_clock_voltage()
3466 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3467 si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3471 rps->ecclk = 0; in si_apply_state_adjust_rules()
7975 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); in si_check_state_equal()
Dsoc15.c432 static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in soc15_set_vce_clocks() argument
Dci_dpm.c937 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()
940 rps->ecclk = 0; in ci_apply_state_adjust_rules()
6178 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); in ci_check_state_equal()
/Linux-v4.19/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h32 u32 ecclk; member

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