| /Linux-v4.19/drivers/mtd/nand/raw/ |
| D | mtk_ecc.c | 126 static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc, in mtk_ecc_wait_idle() argument
129 struct device *dev = ecc->dev; in mtk_ecc_wait_idle()
133 ret = readl_poll_timeout_atomic(ecc->regs + ECC_IDLE_REG(op), val, in mtk_ecc_wait_idle()
143 struct mtk_ecc *ecc = id; in mtk_ecc_irq() local
146 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
149 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
150 if (dec & ecc->sectors) { in mtk_ecc_irq()
155 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]); in mtk_ecc_irq()
156 ecc->sectors = 0; in mtk_ecc_irq()
157 complete(&ecc->done); in mtk_ecc_irq()
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| D | sunxi_nand.c | 691 static u16 sunxi_nfc_randomizer_state(struct mtd_info *mtd, int page, bool ecc) in sunxi_nfc_randomizer_state() argument
699 if (ecc) { in sunxi_nfc_randomizer_state()
710 int page, bool ecc) in sunxi_nfc_randomizer_config() argument
721 state = sunxi_nfc_randomizer_state(mtd, page, ecc); in sunxi_nfc_randomizer_config()
760 bool ecc, int page) in sunxi_nfc_randomizer_write_buf() argument
762 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_write_buf()
769 int len, bool ecc, int page) in sunxi_nfc_randomizer_read_buf() argument
771 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_read_buf()
781 struct sunxi_nand_hw_ecc *data = nand->ecc.priv; in sunxi_nfc_hw_ecc_enable()
790 if (nand->ecc.size == 512) in sunxi_nfc_hw_ecc_enable()
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| D | nand_micron.c | 74 struct micron_on_die_ecc ecc; member
136 .ecc = micron_nand_on_die_4_ooblayout_ecc,
149 oobregion->offset = mtd->oobsize - chip->ecc.total; in micron_nand_on_die_8_ooblayout_ecc()
150 oobregion->length = chip->ecc.total; in micron_nand_on_die_8_ooblayout_ecc()
165 oobregion->length = mtd->oobsize - chip->ecc.total - 2; in micron_nand_on_die_8_ooblayout_free()
171 .ecc = micron_nand_on_die_8_ooblayout_ecc,
181 if (micron->ecc.forced) in micron_nand_on_die_ecc_setup()
184 if (micron->ecc.enabled == enable) in micron_nand_on_die_ecc_setup()
192 micron->ecc.enabled = enable; in micron_nand_on_die_ecc_setup()
231 ret = nand_read_page_op(chip, page, 0, micron->ecc.rawbuf, in micron_nand_on_die_ecc_status_4()
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| D | nand_base.c | 61 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_sp() local
77 oobregion->length = ecc->total - 4; in nand_ooblayout_ecc_sp()
107 .ecc = nand_ooblayout_ecc_sp,
116 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_lp() local
118 if (section || !ecc->total) in nand_ooblayout_ecc_lp()
121 oobregion->length = ecc->total; in nand_ooblayout_ecc_lp()
131 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_free_lp() local
136 oobregion->length = mtd->oobsize - ecc->total - 2; in nand_ooblayout_free_lp()
143 .ecc = nand_ooblayout_ecc_lp,
156 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_lp_hamming() local
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| D | omap2.c | 880 if ((info->nand.ecc.mode == NAND_ECC_HW) && in omap_correct_data()
881 (info->nand.ecc.size == 2048)) in omap_correct_data()
950 val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) | in omap_enable_hwecc()
1054 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1074 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1087 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1143 int eccbytes = info->nand.ecc.bytes; in _omap_calculate_ecc_bch()
1285 int eccbytes = info->nand.ecc.bytes; in omap_calculate_ecc_bch_multi()
1316 for (i = 0; i < info->nand.ecc.size; i++) { in erased_sector_bitflips()
1318 if (flip_bits > info->nand.ecc.strength) in erased_sector_bitflips()
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| D | nand_bch.c | 54 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_calculate_ecc()
57 memset(code, 0, chip->ecc.bytes); in nand_bch_calculate_ecc()
58 encode_bch(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc()
61 for (i = 0; i < chip->ecc.bytes; i++) in nand_bch_calculate_ecc()
81 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_correct_data()
85 count = decode_bch(nbc->bch, NULL, chip->ecc.size, read_ecc, calc_ecc, in nand_bch_correct_data()
89 if (errloc[i] < (chip->ecc.size*8)) in nand_bch_correct_data()
127 unsigned int eccsize = nand->ecc.size; in nand_bch_init()
128 unsigned int eccbytes = nand->ecc.bytes; in nand_bch_init()
129 unsigned int eccstrength = nand->ecc.strength; in nand_bch_init()
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| D | fsmc_nand.c | 172 if (section >= chip->ecc.steps) in fsmc_ecc1_ooblayout_ecc()
186 if (section >= chip->ecc.steps) in fsmc_ecc1_ooblayout_free()
191 if (section < chip->ecc.steps - 1) in fsmc_ecc1_ooblayout_free()
200 .ecc = fsmc_ecc1_ooblayout_ecc,
215 if (section >= chip->ecc.steps) in fsmc_ecc4_ooblayout_ecc()
218 oobregion->length = chip->ecc.bytes; in fsmc_ecc4_ooblayout_ecc()
233 if (section >= chip->ecc.steps) in fsmc_ecc4_ooblayout_free()
238 if (section < chip->ecc.steps - 1) in fsmc_ecc4_ooblayout_free()
247 .ecc = fsmc_ecc4_ooblayout_ecc,
389 uint8_t *ecc) in fsmc_read_hwecc_ecc4() argument
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| D | mtk_nand.c | 151 struct mtk_ecc *ecc; member
188 return (u8 *)p + i * chip->ecc.size; in data_ptr()
214 return chip->ecc.size + mtk_nand->spare_per_sector; in mtk_data_len()
228 return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size; in mtk_oob_ptr()
338 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
344 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
350 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
367 if (chip->ecc.size == 1024) in mtk_nfc_hw_runtime_config()
386 nfc->ecc_cfg.strength = chip->ecc.strength; in mtk_nfc_hw_runtime_config()
387 nfc->ecc_cfg.len = chip->ecc.size + mtk_nand->fdm.ecc_size; in mtk_nfc_hw_runtime_config()
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| D | tango_nand.c | 184 u8 *ecc = chip->oob_poi + BBM_SIZE + METADATA_SIZE; in check_erased_page() local
185 const int ecc_size = chip->ecc.bytes; in check_erased_page()
186 const int pkt_size = chip->ecc.size; in check_erased_page()
189 for (i = 0; i < chip->ecc.steps; ++i) { in check_erased_page()
191 res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size, in check_erased_page()
193 chip->ecc.strength); in check_erased_page()
201 ecc += ecc_size; in check_erased_page()
287 chip->ecc.read_oob(mtd, chip, page); in tango_read_page()
295 chip->ecc.read_oob_raw(mtd, chip, page); in tango_read_page()
378 const int ecc_size = chip->ecc.bytes; in raw_read()
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| D | jz4780_nand.c | 140 params.size = nand->chip.ecc.size; in jz4780_nand_ecc_calculate()
141 params.bytes = nand->chip.ecc.bytes; in jz4780_nand_ecc_calculate()
142 params.strength = nand->chip.ecc.strength; in jz4780_nand_ecc_calculate()
154 params.size = nand->chip.ecc.size; in jz4780_nand_ecc_correct()
155 params.bytes = nand->chip.ecc.bytes; in jz4780_nand_ecc_correct()
156 params.strength = nand->chip.ecc.strength; in jz4780_nand_ecc_correct()
167 chip->ecc.bytes = fls((1 + 8) * chip->ecc.size) * in jz4780_nand_attach_chip()
168 (chip->ecc.strength / 8); in jz4780_nand_attach_chip()
170 switch (chip->ecc.mode) { in jz4780_nand_attach_chip()
178 chip->ecc.hwctl = jz4780_nand_ecc_hwctl; in jz4780_nand_attach_chip()
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| D | qcom_nandc.c | 1398 struct nand_ecc_ctrl *ecc = &chip->ecc; in parse_erase_write_errors() local
1402 num_cw = command == NAND_CMD_PAGEPROG ? ecc->steps : 1; in parse_erase_write_errors()
1449 struct nand_ecc_ctrl *ecc = &chip->ecc; in qcom_nandc_command() local
1484 update_rw_regs(host, ecc->steps, true); in qcom_nandc_command()
1597 struct nand_ecc_ctrl *ecc = &chip->ecc; in qcom_nandc_read_cw_raw() local
1609 data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1); in qcom_nandc_read_cw_raw()
1612 if (cw == (ecc->steps - 1)) { in qcom_nandc_read_cw_raw()
1613 data_size2 = ecc->size - data_size1 - in qcom_nandc_read_cw_raw()
1614 ((ecc->steps - 1) * 4); in qcom_nandc_read_cw_raw()
1615 oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw + in qcom_nandc_read_cw_raw()
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| D | lpc32xx_slc.c | 178 .ecc = lpc32xx_ooblayout_ecc,
418 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count) in lpc32xx_slc_ecc_copy() argument
423 uint32_t ce = ecc[i / 3]; in lpc32xx_slc_ecc_copy()
542 for (i = 0; i < chip->ecc.steps; i++) { in lpc32xx_xfer()
545 dma_buf + i * chip->ecc.size, in lpc32xx_xfer()
546 mtd->writesize / chip->ecc.steps, dir); in lpc32xx_xfer()
551 if (i == chip->ecc.steps - 1) in lpc32xx_xfer()
583 host->ecc_buf[chip->ecc.steps - 1] = in lpc32xx_xfer()
626 status = lpc32xx_xfer(mtd, buf, chip->ecc.steps, 1); in lpc32xx_nand_read_page_syndrome()
632 lpc32xx_slc_ecc_copy(tmpecc, (uint32_t *) host->ecc_buf, chip->ecc.steps); in lpc32xx_nand_read_page_syndrome()
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| D | tegra_nand.c | 182 struct mtd_oob_region ecc; member
204 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 oobregion->length = round_up(bytes_per_step * chip->ecc.steps, 4); in tegra_nand_ooblayout_rs_ecc()
223 .ecc = tegra_nand_ooblayout_rs_ecc,
231 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_BCH * chip->ecc.strength, in tegra_nand_ooblayout_bch_ecc()
238 oobregion->length = round_up(bytes_per_step * chip->ecc.steps, 4); in tegra_nand_ooblayout_bch_ecc()
244 .ecc = tegra_nand_ooblayout_bch_ecc,
486 if (chip->ecc.algo == NAND_ECC_BCH && enable) in tegra_nand_hw_ecc()
707 if (fail_sec_flag ^ GENMASK(chip->ecc.steps - 1, 0)) { in tegra_nand_read_page_hwecc()
723 for_each_set_bit(bit, &fail_sec_flag, chip->ecc.steps) { in tegra_nand_read_page_hwecc()
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| D | cs553x_nand.c | 170 uint32_t ecc; in cs_calculate_ecc() local
174 ecc = readl(mmio_base + MM_NAND_STS); in cs_calculate_ecc()
176 ecc_code[1] = ecc >> 8; in cs_calculate_ecc()
177 ecc_code[0] = ecc >> 16; in cs_calculate_ecc()
178 ecc_code[2] = ecc >> 24; in cs_calculate_ecc()
226 this->ecc.mode = NAND_ECC_HW; in cs553x_init_one()
227 this->ecc.size = 256; in cs553x_init_one()
228 this->ecc.bytes = 3; in cs553x_init_one()
229 this->ecc.hwctl = cs_enable_hwecc; in cs553x_init_one()
230 this->ecc.calculate = cs_calculate_ecc; in cs553x_init_one()
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| D | tmio_nand.c | 275 unsigned int ecc; in tmio_nand_calculate_ecc() local
279 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
280 ecc_code[1] = ecc; /* 000-255 LP7-0 */ in tmio_nand_calculate_ecc()
281 ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */ in tmio_nand_calculate_ecc()
282 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
283 ecc_code[2] = ecc; /* 000-255 CP5-0,11b */ in tmio_nand_calculate_ecc()
284 ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */ in tmio_nand_calculate_ecc()
285 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
286 ecc_code[3] = ecc; /* 256-511 LP15-8 */ in tmio_nand_calculate_ecc()
287 ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */ in tmio_nand_calculate_ecc()
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| D | omap_elm.c | 172 struct elm_errorvec *err_vec, u8 *ecc) in elm_load_syndrome() argument
187 val = cpu_to_be32(*(u32 *) &ecc[9]); in elm_load_syndrome()
192 val = cpu_to_be32(*(u32 *) &ecc[5]); in elm_load_syndrome()
197 val = cpu_to_be32(*(u32 *) &ecc[1]); in elm_load_syndrome()
202 val = ecc[0]; in elm_load_syndrome()
207 val = (cpu_to_be32(*(u32 *) &ecc[3]) >> 4) | in elm_load_syndrome()
208 ((ecc[2] & 0xf) << 28); in elm_load_syndrome()
213 val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12; in elm_load_syndrome()
217 val = cpu_to_be32(*(u32 *) &ecc[22]); in elm_load_syndrome()
220 val = cpu_to_be32(*(u32 *) &ecc[18]); in elm_load_syndrome()
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| D | davinci_nand.c | 201 if ((diff >> (12 + 3)) < chip->ecc.size) { in nand_davinci_correct_1bit()
519 .ecc = hwecc4_ooblayout_small_ecc,
618 switch (info->chip.ecc.mode) { in davinci_nand_attach_chip()
630 info->chip.ecc.algo = NAND_ECC_HAMMING; in davinci_nand_attach_chip()
650 info->chip.ecc.calculate = nand_davinci_calculate_4bit; in davinci_nand_attach_chip()
651 info->chip.ecc.correct = nand_davinci_correct_4bit; in davinci_nand_attach_chip()
652 info->chip.ecc.hwctl = nand_davinci_hwctl_4bit; in davinci_nand_attach_chip()
653 info->chip.ecc.bytes = 10; in davinci_nand_attach_chip()
654 info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK; in davinci_nand_attach_chip()
655 info->chip.ecc.algo = NAND_ECC_BCH; in davinci_nand_attach_chip()
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| /Linux-v4.19/drivers/dma/ti/ |
| D | edma.c | 216 struct edma_cc *ecc; member
290 static inline unsigned int edma_read(struct edma_cc *ecc, int offset) in edma_read() argument
292 return (unsigned int)__raw_readl(ecc->base + offset); in edma_read()
295 static inline void edma_write(struct edma_cc *ecc, int offset, int val) in edma_write() argument
297 __raw_writel(val, ecc->base + offset); in edma_write()
300 static inline void edma_modify(struct edma_cc *ecc, int offset, unsigned and, in edma_modify() argument
303 unsigned val = edma_read(ecc, offset); in edma_modify()
307 edma_write(ecc, offset, val); in edma_modify()
310 static inline void edma_and(struct edma_cc *ecc, int offset, unsigned and) in edma_and() argument
312 unsigned val = edma_read(ecc, offset); in edma_and()
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| /Linux-v4.19/Documentation/devicetree/bindings/edac/ |
| D | socfpga-eccmgr.txt | 8 - compatible : Should be "altr,socfpga-ecc-manager"
17 - compatible : Should be "altr,socfpga-l2-ecc"
24 - compatible : Should be "altr,socfpga-ocram-ecc"
33 compatible = "altr,socfpga-ecc-manager";
38 l2-ecc@ffd08140 {
39 compatible = "altr,socfpga-l2-ecc";
44 ocram-ecc@ffd08144 {
45 compatible = "altr,socfpga-ocram-ecc";
58 - compatible : Should be "altr,socfpga-a10-ecc-manager"
73 - compatible : Should be "altr,socfpga-a10-l2-ecc"
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| /Linux-v4.19/drivers/mtd/nand/raw/atmel/ |
| D | pmecc.c | 229 if (req->ecc.sectorsize == 512) { in atmel_pmecc_create_gf_tables()
263 if (req->ecc.sectorsize == 512) in atmel_pmecc_get_gf_tables()
285 if (req->pagesize <= 0 || req->oobsize <= 0 || req->ecc.bytes <= 0) in atmel_pmecc_prepare_user_req()
288 if (req->ecc.ooboffset >= 0 && in atmel_pmecc_prepare_user_req()
289 req->ecc.ooboffset + req->ecc.bytes > req->oobsize) in atmel_pmecc_prepare_user_req()
292 if (req->ecc.sectorsize == ATMEL_PMECC_SECTOR_SIZE_AUTO) { in atmel_pmecc_prepare_user_req()
293 if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH) in atmel_pmecc_prepare_user_req()
297 req->ecc.sectorsize = 1024; in atmel_pmecc_prepare_user_req()
299 req->ecc.sectorsize = 512; in atmel_pmecc_prepare_user_req()
302 if (req->ecc.sectorsize != 512 && req->ecc.sectorsize != 1024) in atmel_pmecc_prepare_user_req()
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| /Linux-v4.19/Documentation/devicetree/bindings/mtd/ |
| D | mtk-nand.txt | 23 - ecc-engine: Required ECC Engine node.
36 ecc-engine = <&bch>;
49 - nand-ecc-mode: the NAND ecc mode (check driver for supported modes)
50 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
55 - nand-ecc-strength: Number of bits to correct per ECC step.
65 E : nand-ecc-strength.
71 Q : nand-ecc-step-size.
75 this number depends on max ecc step size
77 If max ecc step size supported is 1024,
79 ecc step size is 512, then it should be
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| D | hisi504-nand.txt | 11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
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| D | gpmc-nand.txt | 27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
28 "sw" 1-bit Hamming ecc code via software
31 "ham1" 1-bit Hamming ecc code
32 "bch4" 4-bit BCH ecc code
33 "bch8" 8-bit BCH ecc code
79 ti,nand-ecc-opt = "bch8";
113 support ecc-schemes with hardware error-correction (BCHx_HW). However
114 such SoC can use ecc-schemes with software library for error-correction
120 Other factor which governs the selection of ecc-scheme is oob-size.
131 '3' for HAM1_xx ecc schemes
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| D | nvidia-tegra20-nand.txt | 25 - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
27 - nand-ecc-algo: string, algorithm of NAND ECC.
31 - nand-ecc-strength: integer representing the number of bits to correct
36 - nand-ecc-maximize: See nand.txt
60 nand-ecc-algo = "bch";
61 nand-ecc-strength = <8>;
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| /Linux-v4.19/fs/ocfs2/ |
| D | blockcheck.c | 395 u32 ecc; in ocfs2_block_check_compute() local
400 ecc = ocfs2_hamming_encode_block(data, blocksize); in ocfs2_block_check_compute()
406 BUG_ON(ecc > USHRT_MAX); in ocfs2_block_check_compute()
409 bc->bc_ecc = cpu_to_le16((u16)ecc); in ocfs2_block_check_compute()
427 u32 crc, ecc; in ocfs2_block_check_validate() local
447 ecc = ocfs2_hamming_encode_block(data, blocksize); in ocfs2_block_check_validate()
448 ocfs2_hamming_fix_block(data, blocksize, ecc ^ bc_ecc); in ocfs2_block_check_validate()
487 u32 crc, ecc; in ocfs2_block_check_compute_bhs() local
496 for (i = 0, crc = ~0, ecc = 0; i < nr; i++) { in ocfs2_block_check_compute_bhs()
503 ecc = (u16)ocfs2_hamming_encode(ecc, bhs[i]->b_data, in ocfs2_block_check_compute_bhs()
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