Searched refs:dppclk_khz (Results 1 – 6 of 6) sorted by relevance
490 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in dcn1_determine_dppclk_threshold()493 bool cur_dpp_div = dccg->clks.dispclk_khz > dccg->clks.dppclk_khz; in dcn1_determine_dppclk_threshold()538 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in dcn1_ramp_up_dispclk_with_dpp()562 dccg->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn1_ramp_up_dispclk_with_dpp()
356 context->bw.dcn.clk.dppclk_khz, in context_clock_trace()364 context->bw.dcn.clk.dppclk_khz, in context_clock_trace()
177 int dppclk_khz; member
205 int dppclk_khz; member
343 dc->current_state->bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()2013 bool should_divided_by_2 = context->bw.dcn.clk.dppclk_khz <= in update_dchubp_dpp()2021 dc->res_pool->dccg->clks.dppclk_khz = should_divided_by_2 ? in update_dchubp_dpp()
1060 context->bw.dcn.clk.dppclk_khz = context->bw.dcn.clk.dispclk_khz / v->dispclk_dppclk_ratio; in dcn_validate_bandwidth()1302 dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz); in dcn_find_dcfclk_suits_all()
