Searched refs:dpm_level (Results 1 – 11 of 11) sorted by relevance
308 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()319 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()320 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()321 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()332 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()403 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
284 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()286 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
1925 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()1930 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()1949 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()1954 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()1993 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()2012 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()2031 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()2050 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
314 uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug);
85 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
646 uint16_t dpm_level, in atomctrl_calculate_voltage_evv_on_sclk() argument695 switch (dpm_level) { in atomctrl_calculate_voltage_evv_on_sclk()
2839 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in smu7_force_dpm_level()2841 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in smu7_force_dpm_level()
4036 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in vega10_dpm_force_dpm_level()4038 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in vega10_dpm_force_dpm_level()
309 if (!(hwmgr->dpm_level & profile_mode_mask)) { in pp_dpm_en_umd_pstate()312 hwmgr->saved_dpm_level = hwmgr->dpm_level; in pp_dpm_en_umd_pstate()345 if (level == hwmgr->dpm_level) in pp_dpm_force_performance_level()367 level = hwmgr->dpm_level; in pp_dpm_get_performance_level()700 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_force_clock_level()865 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) in pp_set_power_profile_mode()918 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_switch_power_profile()
59 struct vi_dpm_level dpm_level[1]; member723 enum amd_dpm_forced_level dpm_level; member
2877 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()2908 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()
