Searched refs:divider_reg (Results 1 – 3 of 3) sorted by relevance
445 void __iomem *divider_reg; /* CSR for divider */ member554 if (pclk->param.divider_reg) { in xgene_clk_recalc_rate()555 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_recalc_rate()584 if (pclk->param.divider_reg) { in xgene_clk_set_rate()593 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_set_rate()598 xgene_clk_write(data, pclk->param.divider_reg + in xgene_clk_set_rate()619 if (pclk->param.divider_reg) { in xgene_clk_round_rate()696 parameters.divider_reg = NULL; in xgene_devclk_init()713 parameters.divider_reg = map_res; in xgene_devclk_init()751 if (parameters.divider_reg) in xgene_devclk_init()[all …]
74 uint32_t divider_reg; member132 .divider_reg = _div_reg, \
205 div->reg = base + mc->divider_reg; in mtk_clk_register_composite()
