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/Linux-v4.19/drivers/clk/berlin/
Dberlin2-div.c66 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
67 struct berlin2_div_map *map = &div->map; in berlin2_div_is_enabled()
70 if (div->lock) in berlin2_div_is_enabled()
71 spin_lock(div->lock); in berlin2_div_is_enabled()
73 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
76 if (div->lock) in berlin2_div_is_enabled()
77 spin_unlock(div->lock); in berlin2_div_is_enabled()
84 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_enable() local
85 struct berlin2_div_map *map = &div->map; in berlin2_div_enable()
88 if (div->lock) in berlin2_div_enable()
[all …]
/Linux-v4.19/drivers/clk/ti/
Ddivider.c36 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
37 if (clkt->div > maxdiv) in _get_table_maxdiv()
38 maxdiv = clkt->div; in _get_table_maxdiv()
58 for (clkt = table; clkt->div; clkt++) in _get_table_div()
60 return clkt->div; in _get_table_div()
76 unsigned int div) in _get_table_val() argument
80 for (clkt = table; clkt->div; clkt++) in _get_table_val()
81 if (clkt->div == div) in _get_table_val()
86 static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) in _get_val() argument
89 return div; in _get_val()
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/Linux-v4.19/drivers/clk/
Dclk-divider.c37 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
38 if (clkt->div > maxdiv && clkt->val <= mask) in _get_table_maxdiv()
39 maxdiv = clkt->div; in _get_table_maxdiv()
48 for (clkt = table; clkt->div; clkt++) in _get_table_mindiv()
49 if (clkt->div < mindiv) in _get_table_mindiv()
50 mindiv = clkt->div; in _get_table_mindiv()
71 for (clkt = table; clkt->div; clkt++) in _get_table_div()
73 return clkt->div; in _get_table_div()
92 unsigned int div) in _get_table_val() argument
96 for (clkt = table; clkt->div; clkt++) in _get_table_val()
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Dclk-cdce706.c32 #define CDCE706_DIVIDER(div) (13 + (div)) argument
53 #define CDCE706_DIVIDER_PLL(div) (9 + (div) - ((div) > 2) - ((div) > 4)) argument
54 #define CDCE706_DIVIDER_PLL_SHIFT(div) ((div) < 2 ? 5 : 3 * ((div) & 1)) argument
55 #define CDCE706_DIVIDER_PLL_MASK(div) (0x7 << CDCE706_DIVIDER_PLL_SHIFT(div)) argument
75 unsigned div; member
172 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); in cdce706_pll_recalc_rate()
175 if (hwd->div && hwd->mul) { in cdce706_pll_recalc_rate()
178 do_div(res, hwd->div); in cdce706_pll_recalc_rate()
182 if (hwd->div) in cdce706_pll_recalc_rate()
183 return parent_rate / hwd->div; in cdce706_pll_recalc_rate()
[all …]
/Linux-v4.19/drivers/clk/mxs/
Dclk-div.c44 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
46 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
52 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
54 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
60 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
63 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
65 ret = mxs_clk_wait(div->reg, div->busy); in clk_div_set_rate()
79 struct clk_div *div; in mxs_clk_div() local
83 div = kzalloc(sizeof(*div), GFP_KERNEL); in mxs_clk_div()
84 if (!div) in mxs_clk_div()
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/Linux-v4.19/drivers/clk/sunxi/
Dclk-sunxi.c43 u8 div; in sun4i_get_pll1_factors() local
46 div = req->rate / 6000000; in sun4i_get_pll1_factors()
47 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
60 if (div < 10) in sun4i_get_pll1_factors()
64 else if (div < 20 || (div < 32 && (div & 1))) in sun4i_get_pll1_factors()
69 else if (div < 40 || (div < 64 && (div & 2))) in sun4i_get_pll1_factors()
77 div <<= req->p; in sun4i_get_pll1_factors()
78 div /= (req->k + 1); in sun4i_get_pll1_factors()
79 req->n = div / 4; in sun4i_get_pll1_factors()
167 u8 div; in sun8i_a23_get_pll1_factors() local
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Dclk-sun9i-cpus.c35 #define SUN9I_CPUS_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_DIV_MASK) | \ argument
36 (div << SUN9I_CPUS_DIV_SHIFT))
41 #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_PLL4_DIV_MASK) | \ argument
42 (div << SUN9I_CPUS_PLL4_DIV_SHIFT))
74 u8 div, pre_div = 1; in sun9i_a80_cpus_clk_round() local
83 div = DIV_ROUND_UP(parent_rate, rate); in sun9i_a80_cpus_clk_round()
86 if (parent == SUN9I_CPUS_MUX_PARENT_PLL4 && div > 4) { in sun9i_a80_cpus_clk_round()
88 if (div < 32) { in sun9i_a80_cpus_clk_round()
89 pre_div = div; in sun9i_a80_cpus_clk_round()
90 div = 1; in sun9i_a80_cpus_clk_round()
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Dclk-sun6i-ar100.c28 unsigned long div; in sun6i_get_ar100_factors() local
35 div = DIV_ROUND_UP(req->parent_rate, req->rate); in sun6i_get_ar100_factors()
37 if (div < 32) in sun6i_get_ar100_factors()
39 else if (div >> 1 < 32) in sun6i_get_ar100_factors()
41 else if (div >> 2 < 32) in sun6i_get_ar100_factors()
46 div >>= shift; in sun6i_get_ar100_factors()
48 if (div > 32) in sun6i_get_ar100_factors()
49 div = 32; in sun6i_get_ar100_factors()
51 req->rate = (req->parent_rate >> shift) / div; in sun6i_get_ar100_factors()
52 req->m = div - 1; in sun6i_get_ar100_factors()
/Linux-v4.19/drivers/clk/bcm/
Dclk-iproc-asiu.c32 struct iproc_asiu_div div; member
92 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_recalc_rate()
93 if ((val & (1 << clk->div.en_shift)) == 0) { in iproc_asiu_clk_recalc_rate()
99 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
101 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
114 unsigned int div; in iproc_asiu_clk_round_rate() local
122 div = DIV_ROUND_UP(*parent_rate, rate); in iproc_asiu_clk_round_rate()
123 if (div < 2) in iproc_asiu_clk_round_rate()
126 return *parent_rate / div; in iproc_asiu_clk_round_rate()
134 unsigned int div, div_h, div_l; in iproc_asiu_clk_set_rate() local
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Dclk-kona.c57 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value() argument
59 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value()
67 u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) in scaled_div_build() argument
75 combined <<= div->u.s.frac_width; in scaled_div_build()
82 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min() argument
84 if (divider_is_fixed(div)) in scaled_div_min()
85 return (u64)div->u.fixed; in scaled_div_min()
87 return scaled_div_value(div, 0); in scaled_div_min()
91 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max() argument
95 if (divider_is_fixed(div)) in scaled_div_max()
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Dclk-kona-setup.c55 struct bcm_clk_div *div; in clk_requires_trigger() local
64 div = &peri->div; in clk_requires_trigger()
65 if (!divider_exists(div)) in clk_requires_trigger()
69 if (!divider_is_fixed(div)) in clk_requires_trigger()
72 div = &peri->pre_div; in clk_requires_trigger()
74 return divider_exists(div) && !divider_is_fixed(div); in clk_requires_trigger()
83 struct bcm_clk_div *div; in peri_clk_data_offsets_valid() local
129 div = &peri->div; in peri_clk_data_offsets_valid()
130 if (divider_exists(div)) { in peri_clk_data_offsets_valid()
131 if (div->u.s.offset > limit) { in peri_clk_data_offsets_valid()
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/Linux-v4.19/drivers/clk/meson/
Dclk-regmap.c57 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); in clk_regmap_div_recalc_rate() local
61 ret = regmap_read(clk->map, div->offset, &val); in clk_regmap_div_recalc_rate()
66 val >>= div->shift; in clk_regmap_div_recalc_rate()
67 val &= clk_div_mask(div->width); in clk_regmap_div_recalc_rate()
68 return divider_recalc_rate(hw, prate, val, div->table, div->flags, in clk_regmap_div_recalc_rate()
69 div->width); in clk_regmap_div_recalc_rate()
76 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); in clk_regmap_div_round_rate() local
81 if (div->flags & CLK_DIVIDER_READ_ONLY) { in clk_regmap_div_round_rate()
82 ret = regmap_read(clk->map, div->offset, &val); in clk_regmap_div_round_rate()
87 val >>= div->shift; in clk_regmap_div_round_rate()
[all …]
/Linux-v4.19/drivers/clk/tegra/
Dclk-divider.c35 int div; in get_div() local
37 div = div_frac_get(rate, parent_rate, divider->width, in get_div()
40 if (div < 0) in get_div()
43 return div; in get_div()
51 int div, mul; in clk_frac_div_recalc_rate() local
55 div = reg & div_mask(divider); in clk_frac_div_recalc_rate()
58 div += mul; in clk_frac_div_recalc_rate()
61 rate += div - 1; in clk_frac_div_recalc_rate()
62 do_div(rate, div); in clk_frac_div_recalc_rate()
71 int div, mul; in clk_frac_div_round_rate() local
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/Linux-v4.19/drivers/clk/sprd/
Ddiv.c13 const struct sprd_div_internal *div, in sprd_div_helper_round_rate() argument
18 NULL, div->width, 0); in sprd_div_helper_round_rate()
27 return sprd_div_helper_round_rate(&cd->common, &cd->div, in sprd_div_round_rate()
32 const struct sprd_div_internal *div, in sprd_div_helper_recalc_rate() argument
39 val = reg >> div->shift; in sprd_div_helper_recalc_rate()
40 val &= (1 << div->width) - 1; in sprd_div_helper_recalc_rate()
43 div->width); in sprd_div_helper_recalc_rate()
52 return sprd_div_helper_recalc_rate(&cd->common, &cd->div, parent_rate); in sprd_div_recalc_rate()
56 const struct sprd_div_internal *div, in sprd_div_helper_set_rate() argument
64 div->width, 0); in sprd_div_helper_set_rate()
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/Linux-v4.19/drivers/clk/spear/
Dspear1340_clock.c191 {.div = 0x073A8}, /* for vco1div2 = 600 MHz */
192 {.div = 0x06062}, /* for vco1div2 = 500 MHz */
193 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
194 {.div = 0x04000}, /* for vco1div2 = 332 MHz */
195 {.div = 0x03031}, /* for vco1div2 = 250 MHz */
196 {.div = 0x0268D}, /* for vco1div2 = 200 MHz */
243 {.div = 0x08000},
244 {.div = 0x06a38},
245 {.div = 0x06666},
246 {.div = 0x06000},
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/Linux-v4.19/drivers/clk/qcom/
Dclk-regmap-mux-div.c23 int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div) in mux_div_set_src_div() argument
29 val = (div << md->hid_shift) | (src << md->src_shift); in mux_div_set_src_div()
60 u32 *div) in mux_div_get_src_div() argument
79 *div = d; in mux_div_get_src_div()
92 unsigned int i, div, max_div; in mux_div_determine_rate() local
101 for (div = 1; div < max_div; div++) { in mux_div_determine_rate()
102 parent_rate = mult_frac(req_rate, div, 2); in mux_div_determine_rate()
104 actual_rate = mult_frac(parent_rate, 2, div); in mux_div_determine_rate()
129 u32 div, max_div, best_src = 0, best_div = 0; in __mux_div_set_rate_and_parent() local
138 for (div = 1; div < max_div; div++) { in __mux_div_set_rate_and_parent()
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/Linux-v4.19/sound/aoa/soundbus/i2sbus/
Dinterface.h90 # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK) argument
91 static inline int i2s_sf_mclkdiv(int div, int *out) in i2s_sf_mclkdiv() argument
95 switch(div) { in i2s_sf_mclkdiv()
101 if (div%2) return -1; in i2s_sf_mclkdiv()
102 d = div/2-1; in i2s_sf_mclkdiv()
105 *out |= I2S_SF_MCLKDIV_OTHER(div); in i2s_sf_mclkdiv()
117 # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK) argument
118 static inline int i2s_sf_sclkdiv(int div, int *out) in i2s_sf_sclkdiv() argument
122 switch(div) { in i2s_sf_sclkdiv()
126 if (div%2) return -1; in i2s_sf_sclkdiv()
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/Linux-v4.19/drivers/media/platform/sti/hva/
Dhva-debugfs.c121 u64 div; in hva_dbg_perf_begin() local
131 div = (u64)ktime_us_delta(dbg->begin, prev); in hva_dbg_perf_begin()
132 do_div(div, 100); in hva_dbg_perf_begin()
133 period = (u32)div; in hva_dbg_perf_begin()
152 div = (u64)dbg->window_stream_size * 80; in hva_dbg_perf_begin()
153 do_div(div, dbg->window_duration); in hva_dbg_perf_begin()
154 bitrate = (u32)div; in hva_dbg_perf_begin()
178 u64 div; in hva_dbg_perf_end() local
187 div = stream->vbuf.vb2_buf.timestamp; in hva_dbg_perf_end()
188 do_div(div, 1000); in hva_dbg_perf_end()
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/Linux-v4.19/drivers/clk/hisilicon/
Dclkdivider-hi6220.c108 struct hi6220_clk_divider *div; in hi6220_register_clkdiv() local
116 div = kzalloc(sizeof(*div), GFP_KERNEL); in hi6220_register_clkdiv()
117 if (!div) in hi6220_register_clkdiv()
126 kfree(div); in hi6220_register_clkdiv()
131 table[i].div = min_div + i; in hi6220_register_clkdiv()
132 table[i].val = table[i].div - 1; in hi6220_register_clkdiv()
142 div->reg = reg; in hi6220_register_clkdiv()
143 div->shift = shift; in hi6220_register_clkdiv()
144 div->width = width; in hi6220_register_clkdiv()
145 div->mask = mask_bit ? BIT(mask_bit) : 0; in hi6220_register_clkdiv()
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/Linux-v4.19/drivers/clk/actions/
Dowl-factor.c22 for (clkt = table; clkt->div; clkt++) in _get_table_maxval()
29 unsigned int val, unsigned int *mul, unsigned int *div) in _get_table_div_mul() argument
33 for (clkt = table; clkt->div; clkt++) { in _get_table_div_mul()
36 *div = clkt->div; in _get_table_div_mul()
51 for (clkt = table; clkt->div; clkt++) { in _get_table_val()
53 do_div(calc_rate, clkt->div); in _get_table_val()
86 for (clkt = factor_hw->table; clkt->div; clkt++) { in clk_val_best()
87 try_parent_rate = rate * clkt->div / clkt->mul; in clk_val_best()
91 __func__, clkt->val, clkt->mul, clkt->div, in clk_val_best()
104 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; in clk_val_best()
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/Linux-v4.19/arch/c6x/platforms/
Dplldata.c179 sysclks[2].div = 3; in c6455_setup_clocks()
181 sysclks[3].div = 6; in c6455_setup_clocks()
182 sysclks[4].div = PLLDIV4; in c6455_setup_clocks()
183 sysclks[5].div = PLLDIV5; in c6455_setup_clocks()
217 sysclks[1].div = 1; in c6457_setup_clocks()
219 sysclks[2].div = 3; in c6457_setup_clocks()
221 sysclks[3].div = 6; in c6457_setup_clocks()
222 sysclks[4].div = PLLDIV4; in c6457_setup_clocks()
223 sysclks[5].div = PLLDIV5; in c6457_setup_clocks()
269 sysclks[i].div = 1; in c6472_setup_clocks()
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/Linux-v4.19/drivers/mmc/host/
Dsdhci-cns3xxx.c29 int div = 1; in sdhci_cns3xxx_set_clock() local
40 while (host->max_clk / div > clock) { in sdhci_cns3xxx_set_clock()
45 if (div < 4) in sdhci_cns3xxx_set_clock()
46 div += 1; in sdhci_cns3xxx_set_clock()
47 else if (div < 256) in sdhci_cns3xxx_set_clock()
48 div *= 2; in sdhci_cns3xxx_set_clock()
54 clock, host->max_clk / div); in sdhci_cns3xxx_set_clock()
57 if (div != 3) in sdhci_cns3xxx_set_clock()
58 div >>= 1; in sdhci_cns3xxx_set_clock()
60 clk = div << SDHCI_DIVIDER_SHIFT; in sdhci_cns3xxx_set_clock()
/Linux-v4.19/drivers/media/i2c/
Daptina-pll.c33 unsigned int div; in aptina_pll_calculate() local
50 div = gcd(pll->pix_clock, pll->ext_clock); in aptina_pll_calculate()
51 pll->m = pll->pix_clock / div; in aptina_pll_calculate()
52 div = pll->ext_clock / div; in aptina_pll_calculate()
67 mf_min = max(mf_min, limits->n_min * limits->p1_min / div); in aptina_pll_calculate()
71 mf_max = min(mf_max, DIV_ROUND_UP(limits->n_max * limits->p1_max, div)); in aptina_pll_calculate()
136 p1_min = max(limits->p1_min, DIV_ROUND_UP(limits->out_clock_min * div, in aptina_pll_calculate()
138 p1_max = min(limits->p1_max, limits->out_clock_max * div / in aptina_pll_calculate()
142 unsigned int mf_inc = p1 / gcd(div, p1); in aptina_pll_calculate()
147 limits->int_clock_max * div)), mf_inc); in aptina_pll_calculate()
[all …]
/Linux-v4.19/drivers/clk/sunxi-ng/
Dccu_div.c29 cd->div.table, cd->div.width, in ccu_div_round_rate()
30 cd->div.flags); in ccu_div_round_rate()
67 val = reg >> cd->div.shift; in ccu_div_recalc_rate()
68 val &= (1 << cd->div.width) - 1; in ccu_div_recalc_rate()
73 val = divider_recalc_rate(hw, parent_rate, val, cd->div.table, in ccu_div_recalc_rate()
74 cd->div.flags, cd->div.width); in ccu_div_recalc_rate()
105 val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width, in ccu_div_set_rate()
106 cd->div.flags); in ccu_div_set_rate()
111 reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); in ccu_div_set_rate()
113 writel(reg | (val << cd->div.shift), in ccu_div_set_rate()
/Linux-v4.19/drivers/clk/mvebu/
Dorion.c62 int *mult, int *div) in mv88f5181_get_clk_ratio() argument
68 *div = 2; in mv88f5181_get_clk_ratio()
71 *div = 3; in mv88f5181_get_clk_ratio()
74 *div = 1; in mv88f5181_get_clk_ratio()
130 int *mult, int *div) in mv88f5182_get_clk_ratio() argument
136 *div = 2; in mv88f5182_get_clk_ratio()
139 *div = 3; in mv88f5182_get_clk_ratio()
142 *div = 1; in mv88f5182_get_clk_ratio()
187 int *mult, int *div) in mv88f5281_get_clk_ratio() argument
193 *div = 2; in mv88f5281_get_clk_ratio()
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